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Re: Assembler syntax for 32/64bit

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Alex McDonald <blog@rivadpm.com> writes Re: Assembler syntax for 32/64bit
[..]
> One thought is to change the index syntax to [r15 *2] -- making the
> scale parse separately. Any other ideas?

In iForth we do the following (sorry: wide lines):

 Syntax:
 =======

	breg	= {   al   cl   dl   bl  spl  bpl  sil  dil  r8b r9b r10b r11b r12b r13b r14b r15b }
	wreg    = {   ax   cx   dx   bx   sp   bp   si   di  r8w r9w r10w r11w r12w r13w r14w r15w }
	dwreg   = {  eax  ecx  edx  ebx  esp  ebp  esi  edi  r8d r9d r10d r11d r12d r13d r14d r15d }
	reg     = {  rax  rcx  rdx  rbx  rsp  rbp  rsi  rdi  r8  r9  r10  r11  r12  r13  r14  r15  }
	[base   = { [rax [rcx [rdx [rbx [rsp [rbp [rsi [rdi [r8 [r9 [r10 [r11 [r12 [r13 [r14 [r15  }
	[base]  = { [rax] [rcx] [rdx] [rbx] [rsp] [rbp] [rsi] [rdi] [r8] [r9]  [r10] [r11] [r12] [r13] [r14] [r15] }
	+index  = { +rax +rcx +rdx +rbx +rsp +rbp +rsi +rdi +r8 +r9 +r10 +r11 +r12 +r13 +r14 +r15  }
	freg    = {  ST(0) ST(1) ST(2) ST(3) ST(4) ST(5) ST(6) ST(7) }
	xmmreg  = {  xmm0  xmm1  xmm2  xmm3  xmm4  xmm5  xmm6  xmm7  xmm8 xmm9  xmm10 xmm11 xmm12 xmm13 xmm14 xmm15 }
	mmxreg  = {  mmx0  mmx1  mmx2  mmx3  mmx4  mmx5  mmx6  mmx7 }
	*scale  = { *1 *2 *4 *8 }

		These words may be combined to form any of the following effective addresses:

		[base +index *scale offs    ( offs not optional )
		[base offs		    ( offs not optional )
		[base]
		[_ +index *scale offs       ( offs not optional )
		[_ offs 		    ( offs not optional )

	+]
		Perform the effective address calculations for source or destination. The type
		is always 'offset', so in some cases this must be overridden. Use 
		[base +index *scale 0 +] to signify the special case [base +index *scale ].

	[base]
		A shorthand for [base 0 +].

	b#  
	w#
	d#  
	q#
		Set the data type of destination or source. This might be needed by the instruction 
		processor. Default is q#.

	byte 
	word 
	dword 	
	float
	qword 
	tbyte					( operand types )

	byte-offset				( typed data locations )
	word-offset
	dword-offset
	offset					( cell-data, call and jump )
	tbyte-offset or tbyte-ptr (legacy)
	double-offset
	float-offset
		Set the address type of destination or source. This might be needed by the 
		instruction processor. Default is offset.

	::
		Allows to enter a third operand (for the shrd and shld instructions).

	->	
		Separate source and destination parts. Equivalently, compute the destination
		address using stack values.


Here is some example code (from fjack).

CODE (calc-adp-muls-sse2)
					fpop,
	[rbp -8 +]		qword	fstp,
	[rbp -8 +]	->	xmm0	movsd,
 	xmm1		->	xmm1	subpd,
	1 :: xmm0	->	xmm1	shufpd,
	xmm1		->	xmm0	addpd,
				rax	pop,
				rcx	pop,	\ data
				rdx	pop,	\ multipliers
BEGIN,	#16 b#		->	rax	sub,
0>=, WHILE,
	[rcx]		->	xmm1	movapd,
	[rcx $10 +]	->	xmm2	movapd,
	[rcx $20 +]	->	xmm3	movapd,
	[rcx $30 +]	->	xmm4	movapd,
	[rcx $40 +]	->	xmm5	movapd,
	[rcx $50 +]	->	xmm6	movapd,
	[rcx $60 +]	->	xmm7	movapd,
	[rcx $70 +]	->	xmm8	movapd,
	[rcx $80 +]	->	rcx	lea,
	xmm0		->	xmm1	mulpd,
	xmm0		->	xmm2	mulpd,
	xmm0		->	xmm3	mulpd,
	xmm0		->	xmm4	mulpd,
	xmm0		->	xmm5	mulpd,
	xmm0		->	xmm6	mulpd,
	xmm0		->	xmm7	mulpd,
	xmm0		->	xmm8	mulpd,
	[rdx]		->	xmm1	addpd,
	[rdx $10 +]	->	xmm2	addpd,
	[rdx $20 +]	->	xmm3	addpd,
	[rdx $30 +]	->	xmm4	addpd,
	[rdx $40 +]	->	xmm5	addpd,
	[rdx $50 +]	->	xmm6	addpd,
	[rdx $60 +]	->	xmm7	addpd,
	[rdx $70 +]	->	xmm8	addpd,
	xmm1	->	[rdx]		movapd,
	xmm2	->	[rdx $10 +]	movapd,
	xmm3	->	[rdx $20 +]	movapd,
	xmm4	->	[rdx $30 +]	movapd,
	xmm5	->	[rdx $40 +]	movapd,
	xmm6	->	[rdx $50 +]	movapd,
	xmm7	->	[rdx $60 +]	movapd,
	xmm8	->	[rdx $70 +]	movapd,
	[rdx $80 +]	->	rdx	lea,
REPEAT,	#16 b#		->	rax	add,
	3 b#		->	rax	bt,
cy, IF,	[rcx]		->	xmm1	movapd,
	[rcx $10 +]	->	xmm2	movapd,
	[rcx $20 +]	->	xmm3	movapd,
	[rcx $30 +]	->	xmm4	movapd,
	[rcx $40 +]	->	rcx	lea,
	xmm0		->	xmm1	mulpd,
	xmm0		->	xmm2	mulpd,
	xmm0		->	xmm3	mulpd,
	xmm0		->	xmm4	mulpd,
	[rdx]		->	xmm1	addpd,
	[rdx $10 +]	->	xmm2	addpd,
	[rdx $20 +]	->	xmm3	addpd,
	[rdx $30 +]	->	xmm4	addpd,
	xmm1	->	[rdx]		movapd,
	xmm2	->	[rdx $10 +]	movapd,
	xmm3	->	[rdx $20 +]	movapd,
	xmm4	->	[rdx $30 +]	movapd,
	[rdx $40 +]	->	rdx	lea,
THEN,	2 b#		->	rax	bt,
cy, IF,	[rcx]		->	xmm1	movapd,
	[rcx $10 +]	->	xmm2	movapd,
	[rcx $20 +]	->	rcx	lea,
	xmm0		->	xmm1	mulpd,
	xmm0		->	xmm2	mulpd,
	[rdx]		->	xmm1	addpd,
	[rdx $10 +]	->	xmm2	addpd,
	xmm1	->	[rdx]		movapd,
	xmm2	->	[rdx $10 +]	movapd,
	[rdx $20 +]	->	rdx	lea,
THEN,	2 b#		->	rax	bt,
cy, IF,	[rcx]		->	xmm1	movapd,
	xmm0		->	xmm1	mulpd,
	[rdx]		->	xmm1	addpd,
	xmm1	->	[rdx]		movapd,
THEN,
				rbx	jmp,
END-CODE

-marcel

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Thread

Assembler syntax for 32/64bit Alex McDonald <blog@rivadpm.com> - 2011-05-03 12:14 -0700
  Re: Assembler syntax for 32/64bit Andreas <a.k.k@nospam.org> - 2011-05-03 22:08 +0200
    Re: Assembler syntax for 32/64bit Alex McDonald <blog@rivadpm.com> - 2011-05-03 13:37 -0700
      Re: Assembler syntax for 32/64bit Elizabeth D Rather <erather@forth.com> - 2011-05-03 11:33 -1000
  Re: Assembler syntax for 32/64bit HighJump <ron.hochsprung@gmail.com> - 2011-05-03 15:41 -0700
  Re: Assembler syntax for 32/64bit Albert van der Horst <albert@spenarnc.xs4all.nl> - 2011-05-04 05:19 +0000
  Re: Assembler syntax for 32/64bit mhx@iae.nl (Marcel Hendrix) - 2011-05-04 07:56 +0200
  Re: Assembler syntax for 32/64bit Jan Coombs <jan_2011-02@murray-microft.co.uk> - 2011-05-04 08:32 +0100
    Re: Assembler syntax for 32/64bit Paul Rubin <no.email@nospam.invalid> - 2011-05-04 01:01 -0700
  Re: Assembler syntax for 32/64bit Andrew Haley <andrew29@littlepinkcloud.invalid> - 2011-05-04 03:10 -0500
  Re: Assembler syntax for 32/64bit Alex McDonald <blog@rivadpm.com> - 2011-05-04 04:39 -0700

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