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Groups > comp.arch > #110102 > unrolled thread
| Started by | jgd@cix.co.uk (John Dallman) |
|---|---|
| First post | 2024-11-28 15:31 +0000 |
| Last post | 2024-12-22 21:37 +0000 |
| Articles | 15 on this page of 115 — 24 participants |
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What is an N-bit machine? jgd@cix.co.uk (John Dallman) - 2024-11-28 15:31 +0000
Re: What is an N-bit machine? scott@slp53.sl.home (Scott Lurndal) - 2024-11-28 16:33 +0000
Re: What is an N-bit machine? Michael S <already5chosen@yahoo.com> - 2024-11-28 18:55 +0200
Re: What is an N-bit machine? John Levine <johnl@taugh.com> - 2024-11-30 02:37 +0000
Re: What is an N-bit machine? Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2024-11-29 22:30 -0800
Re: What is an N-bit machine? John Levine <johnl@taugh.com> - 2024-11-30 19:40 +0000
Re: What is an N-bit machine? Michael S <already5chosen@yahoo.com> - 2024-11-30 22:38 +0200
Re: What is an N-bit machine? "Paul A. Clayton" <paaronclayton@gmail.com> - 2024-12-01 11:23 -0500
Re: What is an N-bit machine? scott@slp53.sl.home (Scott Lurndal) - 2024-12-01 19:52 +0000
Re: What is an N-bit machine? mitchalsup@aol.com (MitchAlsup1) - 2024-11-30 22:39 +0000
Re: What is an N-bit machine? Thomas Koenig <tkoenig@netcologne.de> - 2024-12-01 08:19 +0000
Re: What is an N-bit machine? anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-01 08:35 +0000
Re: What is an N-bit machine? Terje Mathisen <terje.mathisen@tmsw.no> - 2024-12-02 09:48 +0100
Re: What is an N-bit machine? "Brian G. Lucas" <bagel99@gmail.com> - 2024-12-02 19:56 -0500
Re: What is an N-bit machine? Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2024-12-03 00:01 -0800
Re: What is an N-bit machine? antispam@fricas.org (Waldek Hebisch) - 2024-12-15 18:20 +0000
Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-30 06:28 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-30 11:35 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2024-11-30 11:58 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-30 16:57 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Michael S <already5chosen@yahoo.com> - 2024-11-30 19:32 +0200
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-30 18:08 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Michael S <already5chosen@yahoo.com> - 2024-11-30 20:28 +0200
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-01 09:28 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2024-12-01 14:03 +0000
Re: Keeping other stuff with addresses David Schultz <david.schultz@earthlink.net> - 2024-12-01 08:15 -0600
Re: Keeping other stuff with addresses Thomas Koenig <tkoenig@netcologne.de> - 2024-12-01 14:40 +0000
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-04 02:19 +0000
Re: Keeping other stuff with addresses John Levine <johnl@taugh.com> - 2024-12-04 03:25 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Tim Rentsch <tr.17687@z991.linuxsc.com> - 2024-12-01 07:32 -0800
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2024-12-01 17:53 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Michael S <already5chosen@yahoo.com> - 2024-12-01 20:05 +0200
Re: Keeping other stuff with addresses EricP <ThatWouldBeTelling@thevillage.com> - 2024-12-01 18:16 -0500
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Brett <ggtgp@yahoo.com> - 2024-12-01 20:02 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Tim Rentsch <tr.17687@z991.linuxsc.com> - 2024-12-31 08:54 -0800
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2025-01-01 15:28 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Tim Rentsch <tr.17687@z991.linuxsc.com> - 2025-01-01 17:39 -0800
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2025-01-02 09:59 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Tim Rentsch <tr.17687@z991.linuxsc.com> - 2025-01-08 10:00 -0800
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2025-01-08 19:18 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Tim Rentsch <tr.17687@z991.linuxsc.com> - 2025-01-27 17:05 -0800
Re: Keeping other stuff with addresses David Brown <david.brown@hesbynett.no> - 2025-01-28 08:30 +0100
Re: Keeping other stuff with addresses Thomas Koenig <tkoenig@netcologne.de> - 2025-02-02 08:37 +0000
Re: Keeping other stuff with addresses Terje Mathisen <terje.mathisen@tmsw.no> - 2024-12-02 17:10 +0100
Re: Keeping other stuff with addresses Tim Rentsch <tr.17687@z991.linuxsc.com> - 2024-12-31 08:46 -0800
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) John Levine <johnl@taugh.com> - 2024-11-30 19:12 +0000
What is an N-bit machine? anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-01 08:41 +0000
Re: What is an N-bit machine? scott@slp53.sl.home (Scott Lurndal) - 2024-12-01 15:52 +0000
Re: What is an N-bit machine? antispam@fricas.org (Waldek Hebisch) - 2024-12-16 22:39 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) Thomas Koenig <tkoenig@netcologne.de> - 2024-11-30 22:06 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-01 08:38 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) scott@slp53.sl.home (Scott Lurndal) - 2024-11-30 17:57 +0000
Re: Keeping other stuff with addresses (was: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-01 09:38 +0000
Re: Keeping other stuff with addresses "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-01 15:22 -0800
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-02 01:26 +0000
Re: Keeping other stuff with addresses "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-01 20:12 -0800
Re: Keeping other stuff with addresses "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-02 16:54 -0800
Re: Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-03 11:51 -0500
Re: Keeping other stuff with addresses John Levine <johnl@taugh.com> - 2024-12-03 18:19 +0000
Re: Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-03 13:46 -0500
Re: Keeping other stuff with addresses John Levine <johnl@taugh.com> - 2024-12-03 23:33 +0000
Re: Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-03 18:52 -0500
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-04 02:36 +0000
Re: Keeping other stuff with addresses Thomas Koenig <tkoenig@netcologne.de> - 2024-12-04 06:29 +0000
Re: Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-04 10:32 -0500
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-04 19:47 +0000
Re: Keeping other stuff with addresses Keith Thompson <Keith.S.Thompson+u@gmail.com> - 2024-12-04 15:47 -0800
Re: Keeping other stuff with addresses scott@slp53.sl.home (Scott Lurndal) - 2024-12-04 16:31 +0000
Re: bytes, Keeping other stuff with addresses John Levine <johnl@taugh.com> - 2024-12-05 00:39 +0000
unaligned load/store (was: Re: Keeping other stuff with addresses) Jonathan Thornburg <jonathan@gold.bkis-orchard.net> - 2024-12-21 23:22 +0000
Re: unaligned load/store mitchalsup@aol.com (MitchAlsup1) - 2024-12-22 01:27 +0000
Re: unaligned load/store Thomas Koenig <tkoenig@netcologne.de> - 2024-12-22 10:01 +0000
Re: unaligned load/store anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-22 11:06 +0000
Re: unaligned load/store jgd@cix.co.uk (John Dallman) - 2024-12-22 11:42 +0000
Re: unaligned load/store "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-22 19:41 -0800
Re: unaligned load/store Thomas Koenig <tkoenig@netcologne.de> - 2024-12-22 21:04 +0000
Re: unaligned load/store mitchalsup@aol.com (MitchAlsup1) - 2024-12-22 23:32 +0000
Re: unaligned load/store Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-26 13:38 -0500
Re: unaligned load/store George Neuner <gneuner2@comcast.net> - 2024-12-26 16:31 -0500
Re: unaligned load/store mitchalsup@aol.com (MitchAlsup1) - 2024-12-26 21:59 +0000
Re: unaligned load/store "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-26 14:05 -0800
Re: unaligned load/store (was: Re: Keeping other stuff with addresses) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-12-22 10:33 +0000
Re: bits and bytes, Keeping other stuff with addresses John Levine <johnl@taugh.com> - 2024-12-04 03:39 +0000
Re: bits and bytes, Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-04 10:36 -0500
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-03 19:22 +0000
Re: Keeping other stuff with addresses "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-03 17:03 -0800
Re: Keeping other stuff with addresses "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2024-12-03 16:56 -0800
Re: Keeping other stuff with addresses Stefan Monnier <monnier@iro.umontreal.ca> - 2024-12-04 10:37 -0500
Re: Keeping other stuff with addresses Keith Thompson <Keith.S.Thompson+u@gmail.com> - 2024-12-03 17:43 -0800
Re: Keeping other stuff with addresses mitchalsup@aol.com (MitchAlsup1) - 2024-12-04 02:42 +0000
Re: What is an N-bit machine? Thomas Koenig <tkoenig@netcologne.de> - 2024-11-28 17:56 +0000
Re: What is an N-bit machine? mitchalsup@aol.com (MitchAlsup1) - 2024-11-28 19:02 +0000
Re: What is an N-bit machine? Brett <ggtgp@yahoo.com> - 2024-11-28 19:39 +0000
Re: What is an N-bit machine? Lawrence D'Oliveiro <ldo@nz.invalid> - 2024-11-28 21:42 +0000
Re: What is an N-bit machine? jgd@cix.co.uk (John Dallman) - 2024-11-28 22:08 +0000
Re: What is an N-bit machine? Lynn Wheeler <lynn@garlic.com> - 2024-11-28 12:44 -1000
Re: What is an N-bit machine? jgd@cix.co.uk (John Dallman) - 2024-11-28 22:58 +0000
IBM and Amdahl history (Re: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-29 07:22 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) Lynn Wheeler <lynn@garlic.com> - 2024-11-29 08:24 -1000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) scott@slp53.sl.home (Scott Lurndal) - 2024-11-29 18:29 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) Lynn Wheeler <lynn@garlic.com> - 2024-11-29 11:51 -1000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) Lawrence D'Oliveiro <ldo@nz.invalid> - 2024-11-29 21:51 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) scott@slp53.sl.home (Scott Lurndal) - 2024-11-30 17:45 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-30 18:19 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) jgd@cix.co.uk (John Dallman) - 2024-11-30 22:19 +0000
Re: IBM and Amdahl history (Re: What is an N-bit machine?) Lawrence D'Oliveiro <ldo@nz.invalid> - 2024-11-30 23:21 +0000
Re: What is an N-bit machine? Lawrence D'Oliveiro <ldo@nz.invalid> - 2024-11-29 02:17 +0000
Re: What is an N-bit machine? Brett <ggtgp@yahoo.com> - 2024-11-30 01:29 +0000
Re: market power, What is an N-bit machine? John Levine <johnl@taugh.com> - 2024-11-30 02:42 +0000
Re: What is an N-bit machine? Lynn Wheeler <lynn@garlic.com> - 2024-11-29 17:42 -1000
Re: What is an N-bit machine? mitchalsup@aol.com (MitchAlsup1) - 2024-11-28 19:01 +0000
Re: What is an N-bit machine? Lynn Wheeler <lynn@garlic.com> - 2024-11-28 11:45 -1000
Re: What is an N-bit machine? anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2024-11-29 08:03 +0000
Re: What is an N-bit machine? Thomas Koenig <tkoenig@netcologne.de> - 2024-11-29 19:17 +0000
Re: What is an N-bit machine? Lawrence D'Oliveiro <ldo@nz.invalid> - 2024-12-22 21:37 +0000
Page 6 of 6 — ← Prev page 1 2 3 4 5 [6]
| From | Lynn Wheeler <lynn@garlic.com> |
|---|---|
| Date | 2024-11-29 11:51 -1000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <875xo5pv3o.fsf@localhost> |
| In reply to | #110115 |
anton@mips.complang.tuwien.ac.at (Anton Ertl) writes: > OTOH, FS eventually led to S/38 and the System i, which IBM sold > rather than introducing low-end S/370 (and later s390 and s390x) > members. The way that Heinz Zemanek (head of IBM's Vienna Lab until > 1976) told the story was that IBM was preparing to be divided up if > they lost the anti-trust action, and introduced S/38 and one other > line (that I don't remember) in addition to S/370 for that. one of the last nails in the future system coffin was study by the IBM Houston Scientific Center that if 370/195 applications were rewritten for Future System machine made out of the fastest available technology, it would have throughput of 370/145 (about factor of 30 times slowdown). After graduating and joining IBM, one of my hobbies was enhanced production operating systems for IBM internal datacenters ... and was ask to visit lots of locations in US, world trade, europe, asia, etc (one of my 1st and long time customers was the world-wide, branch office, online sales&marketing support HONE systems). I continued to work on 360/370 all through FS, even periodically ridiculing what they were doing (it seemed as if the people were so dazzled by the blue sky technologies, they had no sense of speeds&feeds). I had done a paged mapped filesystem for CMS and claimed I learned what not to do from TSS/360 single level store. FS single-level store was even slower than TSS/360 and S/38 was simplified and slower yet ... aka for S/38 low-end/entry market there was plenty of head room between their throughput requirements and the available hardware technology, processing power, disk speed, etc. S/38 had lots of canned applications for its market and very high-level, very simplified system and programming environment (very much RPG oriented). Early/mid 80s, my brother was regional Apple marketing manager and when he came into town, I could be invited to business dinners ... including arguing MAC design with developers (before announce). He had stories about figuring out how to remotely dial into the S/38 running Apple to track manufacturing and delivery schedules. other trivia: late 70s, IBM had effort to move the large variety of internal custom CISC microprocessors (s/38, low&mid range 370s, controllers, etc) to 801/risc chips (with common programming environment). First half 80s, for various reasons, those 801/RISC efforts floundered (returning to doing custom CISC) and found some of the 801/RISC chip engineers leaving IBM for other vendors. 1996 MIT Sloan The Decline and Rise of IBM https://sloanreview.mit.edu/article/the-decline-and-rise-of-ibm/?switch_view=PDF 1995 l'Ecole de Paris The rise and fall of IBM https://www.ecole.org/en/session/49-the-rise-and-fall-of-ibm 1993 Computer Wars: The Post-IBM World https://www.amazon.com/Computer-Wars-The-Post-IBM-World/dp/1587981394/ -- virtualization experience starting Jan1968, online at home since Mar1970
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| From | Lawrence D'Oliveiro <ldo@nz.invalid> |
|---|---|
| Date | 2024-11-29 21:51 +0000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <vidd16$18mjb$4@dont-email.me> |
| In reply to | #110115 |
On Fri, 29 Nov 2024 07:22:28 GMT, Anton Ertl wrote: > Legacy software is keeping Unisys in business to this day ... Remember where Unisys came from: it’s the merger of two separate mainframe companies, Burroughs and Sperry. The fact that they had to merge showed that they had ceased being viable as separate businesses. So what of the “legacy software” from either Burroughs or Sperry (or both) is contributing to the bottom line of present-day Unisys?
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| From | scott@slp53.sl.home (Scott Lurndal) |
|---|---|
| Date | 2024-11-30 17:45 +0000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <IaI2P.4111$A447.3230@fx37.iad> |
| In reply to | #110121 |
Lawrence D'Oliveiro <ldo@nz.invalid> writes: >On Fri, 29 Nov 2024 07:22:28 GMT, Anton Ertl wrote: > >> Legacy software is keeping Unisys in business to this day ... > >Remember where Unisys came from: it’s the merger of two separate mainframe >companies, Burroughs and Sperry. A bit condescending - technically Burroughs purchased Sperry. Eventually. The first attempt failed. > >The fact that they had to merge showed that they had ceased being viable >as separate businesses. As someone who was there at the time, that was not actually the case. It was more about the Burroughs CEO at the time (former Treasury Secretary Blumenthal) and his ego. That said, it was clear internally by the time of the merger that the days of the million dollar mainframe were at the end. That was one of the reasons that Burroughs bought Convergent Technologies and invested BTOS/CTOS, Unix and research into next generation architectures (such the scalable parallel processor called OPUS). The day the merger closed, Unisys (which name even Johnny Carson joked about), had 120,000 employees. By 1997, there were 20,000; after terminating four lines of legacy mainframes, divesting the defense subsidiarys and site closures. > >So what of the “legacy software” from either Burroughs or Sperry (or both) >is contributing to the bottom line of present-day Unisys? The UIS 10-K is available from the SEC website. Feel free to look it up.
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| From | anton@mips.complang.tuwien.ac.at (Anton Ertl) |
|---|---|
| Date | 2024-11-30 18:19 +0000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <2024Nov30.191907@mips.complang.tuwien.ac.at> |
| In reply to | #110132 |
scott@slp53.sl.home (Scott Lurndal) writes: >Lawrence D'Oliveiro <ldo@nz.invalid> writes: >>On Fri, 29 Nov 2024 07:22:28 GMT, Anton Ertl wrote: >> >>> Legacy software is keeping Unisys in business to this day ... >> >>Remember where Unisys came from: it's the merger of two separate mainframe >>companies, Burroughs and Sperry. ... >>So what of the "legacy software" from either Burroughs or Sperry (or both) >>is contributing to the bottom line of present-day Unisys? > >The UIS 10-K is available from the SEC website. Feel free to look >it up. https://ir.unisys.com/static-files/036649dc-6fad-467e-88e0-fa8c7e736b2e Unfortunately (but as usual), the categories are such that I cannot identify how much revenue (and profit) is based on legacy software and how much is based on something else. The categories given on page 29 are: |* Digital Workplace Solutions (DWS), which provides modern and | traditional workplace solutions; | |* Cloud, Applications & Infrastructure Solutions (CA&I), which | provides digital platform, applications and infrastructure | solutions; and | |* Enterprise Computing Solutions (ECS), which provides solutions that | harness secure, continuous high-intensity computing and enable digital | services through software-defined operating environments. The third (revenue 648M in 2023, and 61.2% of gross profit) probably includes the business based on legacy software; the traditional workplace solutions of the DWS part may also have to do with legacy software. In any case, Unisys still offers Clearpath hardware and both OS2200 (Univac legacy) and MCP (Burroughs legacy), but the hardware is AMD64-based and the old hardware is emulated. Fujitsu still offers S390 hardware, but it's not clear if that is a descendent of Amdahl. An overview of what is still going on in the mainframe business is <https://arcanesciences.com/os2200/app1.html>. Another interesting comparison is VMS Software Inc. (VSI), which took over the VMS legacy in 2015. They are "150+ collegues" and have "2K clients"; Unisys have fewer MCP and OS2200 clients according to the site above, but Unisys had 16300 employees in 2021. Maybe the mainframe clients of Unisys need a bigger support force than the VSI clients, or maybe the Unisys employees mostly work on other things. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>
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| From | jgd@cix.co.uk (John Dallman) |
|---|---|
| Date | 2024-11-30 22:19 +0000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <memo.20241130221943.12904i@jgd.cix.co.uk> |
| In reply to | #110136 |
In article <2024Nov30.191907@mips.complang.tuwien.ac.at>, anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote: > An overview of what is still going on in the mainframe business is > <https://arcanesciences.com/os2200/app1.html>. There's one bit that's puzzling: | Hitachi, though they once had a thriving global business including | North America, markets their systems exclusively in Japan. Until | approximately 2020, they built custom CPUs, but in the latest | generation - the AP10000 - they rebadge IBM Z running their own | MVS-derived VOS3 operating system. I'd guess they have 200-300 | sites, almost all in Japan. If Wikipedia is correct, Hitachi did not extend VOS3 to 64-bit: <https://en.wikipedia.org/wiki/MVS#Closely_related_operating_systems> Wikipedia also says that the 2015 models of IBM Z machines are the last that can run 31-bit operating systems: <https://en.wikipedia.org/wiki/IBM_Z#IBM_z13> It seems like one of these must be wrong, but I don't know which. > Another interesting comparison is VMS Software Inc. (VSI), which > took over the VMS legacy in 2015. They are "150+ collegues" and > have "2K clients"; Unisys have fewer MCP and OS2200 clients > according to the site above, but Unisys had 16300 employees in > 2021. Maybe the mainframe clients of Unisys need a bigger > support force than the VSI clients, or maybe the Unisys employees > mostly work on other things. I've had a little contact with VSI. They /only/ do VMS, which isn't terribly arcane: a 32/64-bit OS that uses ASCII on twos-complement little-endian hardware. It's been ported to x86-64, and that's being adopted by customers. Unisys staff do all kinds of things, and their mainframe OSes are much less mainstream than VMS. John
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| From | Lawrence D'Oliveiro <ldo@nz.invalid> |
|---|---|
| Date | 2024-11-30 23:21 +0000 |
| Subject | Re: IBM and Amdahl history (Re: What is an N-bit machine?) |
| Message-ID | <vig6lo$206e0$2@dont-email.me> |
| In reply to | #110136 |
On Sat, 30 Nov 2024 18:19:07 GMT, Anton Ertl wrote: > Unfortunately (but as usual), the categories are such that I cannot > identify how much revenue (and profit) is based on legacy software and > how much is based on something else. This kind of thing is likely deliberate. If an underperforming division were reported on its own, there would be pressure from shareholders, beancounters etc to do something like lay off staff or otherwise cut resources, spin it off ... in short, disembowel it in some way. So my guess is, what’s left of the legacy mainframe business is very likely a minuscule, even negative contributor to overall profit.
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| From | Lawrence D'Oliveiro <ldo@nz.invalid> |
|---|---|
| Date | 2024-11-29 02:17 +0000 |
| Message-ID | <vib878$pqul$1@dont-email.me> |
| In reply to | #110111 |
On Thu, 28 Nov 2024 22:08 +0000 (GMT Standard Time), John Dallman wrote: > In article <viao3r$na9e$4@dont-email.me>, ldo@nz.invalid (Lawrence > D'Oliveiro) wrote: > >> Apple went through the same sort of thing. Yet it managed the >> transition much more cleanly. > > Apple simply demanded all software become 32-bit clean. The fact that > they didn't forsee the problem and warn software writers not to use the > high 8 bits rather implies they weren't paying attention. Oh, they were paying attention, all right. In the original 1984 Macintosh software, the top 8 bits in a “handle” (pointer to a pointer to a relocatable block) were used to store handle state (e.g. whether the block was locked in a particular memory location). But there were no API calls to save/restore this state. That was fixed in the Mac Plus in 1986. So all had to happen was for app developers to use the new calls, instead of peeking at bits directly. >> This in spite of having an installed base that was orders of >> magnitude larger than the IBM System/360 family. > > Apples and oranges. IBM had fewer but much larger customer > organisations, and could not afford to upset them much. IBM had legendary market power, all the way up to monopoly status. Whatever it decreed, its market had to follow.
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| From | Brett <ggtgp@yahoo.com> |
|---|---|
| Date | 2024-11-30 01:29 +0000 |
| Message-ID | <vidpp0$1b4ar$1@dont-email.me> |
| In reply to | #110114 |
Lawrence D'Oliveiro <ldo@nz.invalid> wrote: > On Thu, 28 Nov 2024 22:08 +0000 (GMT Standard Time), John Dallman wrote: > >> In article <viao3r$na9e$4@dont-email.me>, ldo@nz.invalid (Lawrence >> D'Oliveiro) wrote: >> >>> Apple went through the same sort of thing. Yet it managed the >>> transition much more cleanly. >> >> Apple simply demanded all software become 32-bit clean. The fact that >> they didn't forsee the problem and warn software writers not to use the >> high 8 bits rather implies they weren't paying attention. > > Oh, they were paying attention, all right. In the original 1984 Macintosh > software, the top 8 bits in a “handle” (pointer to a pointer to a > relocatable block) were used to store handle state (e.g. whether the block > was locked in a particular memory location). But there were no API calls > to save/restore this state. That was fixed in the Mac Plus in 1986. So all > had to happen was for app developers to use the new calls, instead of > peeking at bits directly. Yes Apple mostly hid their private use of the high byte, so software would not break when they upgraded. There was one obsolete API call that had a warning that it was only 24 bit safe, and my favorite game Civ IV used that call instead of the modern replacement. I know this because I jumped into the debugger to see why it crashed. >>> This in spite of having an installed base that was orders of >>> magnitude larger than the IBM System/360 family. >> >> Apples and oranges. IBM had fewer but much larger customer >> organisations, and could not afford to upset them much. > > IBM had legendary market power, all the way up to monopoly status. > Whatever it decreed, its market had to follow. >
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| From | John Levine <johnl@taugh.com> |
|---|---|
| Date | 2024-11-30 02:42 +0000 |
| Subject | Re: market power, What is an N-bit machine? |
| Message-ID | <vidu28$pon$2@gal.iecc.com> |
| In reply to | #110114 |
According to Lawrence D'Oliveiro <ldo@nz.invalid>: >> Apples and oranges. IBM had fewer but much larger customer >> organisations, and could not afford to upset them much. > >IBM had legendary market power, all the way up to monopoly status. >Whatever it decreed, its market had to follow. Only up to a point. It was quite a challenge for IBM to get their 70xx and 14xx customers to switch to S/360. That's why most 360 models had emulator firmware that would make them behave like faster versions of the earlier machines. -- Regards, John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies", Please consider the environment before reading this e-mail. https://jl.ly
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| From | Lynn Wheeler <lynn@garlic.com> |
|---|---|
| Date | 2024-11-29 17:42 -1000 |
| Message-ID | <871pytpeu6.fsf@localhost> |
| In reply to | #110114 |
Lawrence D'Oliveiro <ldo@nz.invalid> writes:
> IBM had legendary market power, all the way up to monopoly status.
> Whatever it decreed, its market had to follow.
In the wake of the Future System mid-70s implosion, the head of POK
(high-end mainframe) also convinced corporate to kill the (virtual
machine) VM370 product, shutdown the development group and transfer all
the people to POK to work on MVS/XA (i.e. a lot of XA/370 changes were
to address various bloat&kludges in MVS/370). Come 80s, with 3081 and
MVS/XA, customers weren't converting as planned, continuing to run 3081
370-mode with MVS/370. Amdahl was having more success, it had developed
microcode hypervisor/virtual machine ("multiple domain") support and
able to run both MVS/370 and MVS/XA concurrently on the same (Amdahl)
machine (note Endicott did eventually obtain VM370 product
responsibility for the mid-range 370s, but had to recreate a development
group from scratch).
Amdahl had another advantage, initially 3081 was two processor only and
3081D aggregate MIPS was less than the single processor Amdahl
machine. IBM doubles the processor cache sizes for the 2-CPU 3081K,
having about same aggregate MIPs as Amdahl single CPU .... however at
the time, IBM MVS documents had MVS two-processor (multiprocessor
overhead) support only getting 1.2-1.5 times the throughput of single
processor (aka Amdahl single processor getting full MIPS throughput
while MVS two processor 3081K loosing lots of throughput to
multiprocessor overhead).
POK had done a rudementary virtual software system for MVS/XA testing
... which eventually ships as VM/MA (migration aid) and then VM/SF
(system facility) ... however since 370/XA had been primarily focused to
compensate for MVS issues ... 3081 370/XA required a lot of microcode
tweaks when running in virtual machine mode and 3081 didn't have the
space ... so switching in and out of VM/MA or VM/SF with virtual machine
mode, had a lot of overhead "paging" microcode. It was almost a decade
later before IBM was able to respond to Amdahl's
hypervisor/multiple-domain with 3090 LPAR & PR/SM support.
--
virtualization experience starting Jan1968, online at home since Mar1970
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| From | mitchalsup@aol.com (MitchAlsup1) |
|---|---|
| Date | 2024-11-28 19:01 +0000 |
| Message-ID | <74418df356ac2e3e98a6ed86ca22e512@www.novabbs.org> |
| In reply to | #110102 |
On Thu, 1 Jan 1970 0:00:00 +0000, John Dallman wrote: > In early computer designs, arithmetic registers were much longer than > addresses, the classic examples being machines with 36-bit words and 15- > to 18-bit addresses. > > Large logical address spaces started with the IBM 360, which had 32-bit > arithmetic registers and 32-bit address registers. You couldn't put > 32-bits worth of physical memory in a machine for over a decade after it > appeared, but it was allowed for in the architecture. Until 360/67, the address space was limited to 24 bits. With 360/67 it jumped to 32-bits, only to retreat to 31-bits for the life of 370. > Nowadays, the bit-ness of a machine seems to be the *smaller* of the > arithmetic registers and the address space. The bitness of a machine has lost all significance when one includes 512-bit SIMD registers. And we may be approaching a day where we end up with more address space that bits in an address register !!?
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| From | Lynn Wheeler <lynn@garlic.com> |
|---|---|
| Date | 2024-11-28 11:45 -1000 |
| Message-ID | <87jzcnyqv1.fsf@localhost> |
| In reply to | #110102 |
jgd@cix.co.uk (John Dallman) writes: > In early computer designs, arithmetic registers were much longer than > addresses, the classic examples being machines with 36-bit words and 15- > to 18-bit addresses. > > Large logical address spaces started with the IBM 360, which had 32-bit > arithmetic registers and 32-bit address registers. You couldn't put > 32-bits worth of physical memory in a machine for over a decade after it > appeared, but it was allowed for in the architecture. 360 had 32bit registers but addressing only used 24bits (16mbyte) ... except for 360/67 virtual memory mode which had 32bit addressing (when got around to adding virtual memory to all 370s, it was only 24bit addressing ... it wasn't until the 80s with 370/xa that 31bit addressing was introduced). 360/67 also allowed for all (multiprocessor) CPUs to address all channels (360/65 multiprocessor and later 370 multiprocessor simulated multiprocessor I/O with multi-channel controllers connected to different dedicated processor channels at the same address). 360/67 https://bitsavers.org/pdf/ibm/360/functional_characteristics/A27-2719-0_360-67_funcChar.pdf https://bitsavers.org/pdf/ibm/360/functional_characteristics/GA27-2719-2_360-67_funcChar.pdf Before 370/xa, MVS was getting so bloated that they did hack to 3033 for 64mbyte real memory ... still 24bit (real & virtual) instruction addressing ... but they scavanged two unused bits in the virtual memory 16bit PTE, used to prefix the 12bit page numbers (4096 4096byte pages ... 16mbyte) for 14bit page numbers (16384 4096byte pages) aka translating 24bit (virtual) addresses into 26bit (real) addresses (64mbytes) ... pending 370/xa and 31bit -- virtualization experience starting Jan1968, online at home since Mar1970
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| From | anton@mips.complang.tuwien.ac.at (Anton Ertl) |
|---|---|
| Date | 2024-11-29 08:03 +0000 |
| Message-ID | <2024Nov29.090339@mips.complang.tuwien.ac.at> |
| In reply to | #110102 |
jgd@cix.co.uk (John Dallman) writes: >In early computer designs, arithmetic registers were much longer than >addresses, the classic examples being machines with 36-bit words and 15- >to 18-bit addresses. > >Large logical address spaces started with the IBM 360, which had 32-bit >arithmetic registers and 32-bit address registers. You couldn't put >32-bits worth of physical memory in a machine for over a decade after it >appeared, but it was allowed for in the architecture. > >Nowadays, the bit-ness of a machine seems to be the *smaller* of the >arithmetic registers and the address space. This became true in the early >1970s, as far as I can see, and the terminology became confused around >then. A few examples from that period: > >Classic "8-bit" microprocessors, such as the 8080 or 6800 have 8-bit >arithmetic and 16-bit addressing. > >The PDP-11 has 16-bit arithmetic and 16-bit addressing, plus >bank-switching. In the early 1980s the width of the data bus of the main implementation of an architecture was considered to be defining the bitness of the architecture. This is especially noticable in the 68000, which was usually described as 16-bit CPU, despite having 32-bit address and 32-bit data registers, because it has a 16-bit data bus. I think that even Motorola called it a 16-bit CPU. With low-cost variants such as the 8088, the 68008, and later the 386SX, that idea was not kept up. And later, when the bus sizes outgrew the address sizes (IIRC the Pentium has a 64-bit data bus; these days desktop processors have 128-bit wide memory interfaces (but they are 4x32 bits with DDR5) plus 24 lanes or more of PCIe or alternatives), this concept was not kept up, and we arrived at today's architecture-oriented concept of making the address register size determine the bitness. This works pretty well also for what is considered to be the bitness of the S/360, the PDP-11, and the VAX. But it means that the 68000 is a 32-bit processor, and I think that's the current general opinion. Where this concept does not work: For the earlier 36-bit architectures with registers that hold two 15-bit or 18-bit addresses, this concept does not really work. The CDC-6600, which has 60-bit X (data) registers and 18-bit A and B (address) registers, this concept does not work well, either. We do not consider it to be an 18-bit architecture. And I expect that the 18-bit limitation is not deeply rooted in the architecture, and it could be expanded up to 60 bits without big problems, because the addreses take 60 bits in memory just as the data. For 8-bit CPUs, at least for the 6502 16-bit addresses never exists in architectureal registers (apart from the very implicit PC), only as effective addresses and in the PC. However, it's parent 6800 has a 16-bit index register and a 16-bit stack pointer, and the 8008 has the H and L registers which together form a 16-bit address. So for these architectures the address size does not determine what is generally considered the bitness of these CPUs. >The original 8086 has 16-bit arithmetic and a strange 20-bit addressing >scheme. But, as the protected mode of the 80286 shows, the intent was to use 16-bit addresses in programs (possibly in multiple segments), not 20-bit addresses. Software did not follow this intent, though. In any case the instruction set makes addressing beyond 16-bit addresses so cumbersome that calling it a 16-bit architecture is justified even with the newer, architectural concept of bitness. >Modern architectures have arithmetic and address registers that are the >same size. There was a movement from specialized registers such as the 68000s address and data registers to general-purpose registers (e.g., in the 386 and the original RISCs). But then SIMD extensions were introduced starting in the mid-1990s, and they introduced wider SIMD registers that usually only contain data, not addresses (but Intel introduced scatter/gather instructions that also use SIMD registers for addressing). We still use the size of the proper address registers when we consider the bitness of an architecture. OTOH, we also talk about the bitness of the SIMD extension: SSE and ARMv8 Neon uses 128 bits. But the tendency towards making the SIMD-width an implementation option as in ARM SVE and AFAIK the RISC-V V extension means that we will not use the width of the SIMD extension as an architectural concept, but it will probably increase the usage of the width of the SIMD extension for describing particular implementations. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>
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| From | Thomas Koenig <tkoenig@netcologne.de> |
|---|---|
| Date | 2024-11-29 19:17 +0000 |
| Message-ID | <vid40u$179de$1@dont-email.me> |
| In reply to | #110116 |
Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb: > In the early 1980s the width of the data bus of the main > implementation of an architecture was considered to be defining the > bitness of the architecture. This is especially noticable in the > 68000, which was usually described as 16-bit CPU, despite having > 32-bit address and 32-bit data registers, because it has a 16-bit data > bus. I think that even Motorola called it a 16-bit CPU. With low-cost > variants such as the 8088, the 68008, and later the 386SX, that idea > was not kept up. It had been my impression that the width of the ALU was the definition for many computers - the widest integer that can natively be handled. (That does not really fit for the low-end /360, but that was a 32-bit architecture, and worked for the mid- and high-end machines). The 68000 was indeed advertised as a 16-bit processor, the 68008 also had a 16-bit ALU. The original Nova with its 4-bit ALU does not really fit, I think Edson de Castro quipped was that it was a 4-bit computer masquerading as a 16-bit computer. (They later introduced real 16-bit computers). Notable counterexamples? (OK, the PDP-8/S :-)
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| From | Lawrence D'Oliveiro <ldo@nz.invalid> |
|---|---|
| Date | 2024-12-22 21:37 +0000 |
| Message-ID | <vka0q4$q5fk$1@dont-email.me> |
| In reply to | #110116 |
On Fri, 29 Nov 2024 08:03:39 GMT, Anton Ertl wrote: > ... and AFAIK the RISC-V V extension ... RISC-V is not copying the short-vector style of SIMD that has been adopted by everybody else. They are reviving the old Seymour Cray long-vector idea.
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