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Groups > comp.arch > #115231 > unrolled thread
| Started by | quadi <quadibloc@ca.invalid> |
|---|---|
| First post | 2026-03-07 00:15 +0000 |
| Last post | 2026-03-31 13:11 +0000 |
| Articles | 20 on this page of 597 — 25 participants |
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Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-07 00:15 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-07 19:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-08 01:14 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-08 06:08 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-08 18:43 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-10 01:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-10 13:21 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-10 15:15 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-13 05:02 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-13 16:08 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-13 16:28 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-13 16:33 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-13 16:43 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-13 10:24 -0700
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-13 22:59 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-14 03:17 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-14 14:55 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-14 22:55 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-14 22:58 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-14 23:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-15 01:14 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-15 08:35 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-15 17:43 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-14 23:48 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-15 19:47 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-15 20:56 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-17 18:16 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-17 20:52 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 01:34 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 03:11 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 05:16 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 14:18 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-05 04:33 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-05 14:02 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-01 17:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 19:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-01 19:25 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 02:34 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 02:45 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 21:43 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-04 18:06 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-05-04 13:46 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-06 01:10 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-06 17:19 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-18 05:24 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-01 12:29 -0700
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 01:41 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 02:17 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-05-02 02:37 -0500
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 10:01 -0700
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 11:22 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-05-02 13:58 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 19:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 05:09 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 05:37 -0700
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-02 15:57 +0000
Re: base, index, and so forth Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-02 18:21 +0000
Re: base, index, and so forth Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 12:31 -0700
Re: base, index, and so forth Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 20:21 +0000
Re: base, index, and so forth Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 21:29 +0000
Re: base, index, and so forth Concertina II Instead George Neuner <gneuner2@comcast.net> - 2026-05-03 21:06 -0400
Re: base, index, and so forth Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-05-05 10:12 +0200
Re: base, index, and so forth Concertina II Instead George Neuner <gneuner2@comcast.net> - 2026-05-05 11:55 -0400
Re: base, index, and so forth Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-05-05 21:05 +0200
Re: base, index, and so forth Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-03 08:47 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 17:25 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 11:05 -0700
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 20:35 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 21:42 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-03 13:37 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 19:02 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-02 18:10 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 19:10 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-05-02 15:44 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-05-02 09:45 -0700
Re: index registers, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-02 18:34 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-02 17:35 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 21:53 +0000
Re: immediates, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-02 22:23 +0000
Re: immediates, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-03 11:45 +0000
Re: immediates, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-03 16:27 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 18:33 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 02:26 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-04 05:45 +0000
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-05-04 20:00 -0400
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-06 01:06 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-02 06:19 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-05-02 03:33 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 12:15 +0000
Adressing modes (was: Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-02 17:55 +0000
Re: Adressing modes (was: Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 19:08 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-02 18:48 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 21:59 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-02 23:04 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-15 14:35 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-03-15 15:47 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-16 04:16 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-17 17:53 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-03-17 19:25 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-18 13:51 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-18 19:55 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-03-18 21:08 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-19 21:15 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-22 10:19 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-22 23:06 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-23 07:13 +0000
Re: Concertina II Instead "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-03-19 15:48 -0700
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-20 01:42 +0000
Re: Concertina II Instead "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-03-20 00:34 -0700
Re: Concertina II Instead "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-03-20 00:36 -0700
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-17 19:25 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-17 17:57 -0500
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-18 00:20 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-19 06:56 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-19 22:26 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-20 01:25 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-03-17 20:30 -0400
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-19 00:20 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-19 12:06 +0200
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-19 10:46 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-19 16:15 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-03-19 16:22 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-19 19:00 +0200
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-19 22:32 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-20 01:13 +0200
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-20 01:43 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-20 07:23 +0000
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-03-20 09:27 -0400
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-20 16:01 +0200
Re: Concertina II Instead Andy Valencia <vandys@vsta.org> - 2026-03-20 07:19 -0700
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-20 17:29 +0200
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-21 07:06 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-21 06:06 -0700
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-21 16:21 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-22 01:00 +0200
Re: POWER trends, Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-22 01:12 +0000
Re: POWER trends, Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-22 03:28 +0200
Re: POWER trends, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-22 09:48 +0000
Re: POWER trends, Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-22 17:57 +0000
Re: POWER trends, Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-23 19:18 +0000
Re: POWER trends, Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-23 21:10 +0000
Re: POWER trends, Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-23 21:38 +0000
Re: POWER trends, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-24 18:12 +0000
Re: POWER trends, Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-25 20:31 +0000
Re: POWER trends, Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-25 23:05 +0200
Re: POWER trends, Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-25 21:11 +0000
Re: POWER trends, Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-03-25 22:34 +0100
Re: POWER trends, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-26 22:24 +0000
Re: POWER trends, Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-27 03:50 +0300
Re: POWER trends, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-27 08:12 +0000
Re: POWER trends, Concertina II Instead Niklas Holsti <niklas.holsti@tidorum.invalid> - 2026-03-27 10:33 +0200
Re: POWER trends, Concertina II Instead Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-03-27 16:41 +0000
Re: POWER trends, Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-27 18:53 +0000
multi-tasking performance on one core (was: POWER trends) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-27 08:37 +0000
Re: POWER trends, Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-27 12:46 +0000
Re: POWER trends, Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-24 10:41 +0200
Re: POWER trends, Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-24 11:36 +0000
Re: POWER trends, Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-22 08:49 +0000
Re: POWER trends, Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-27 12:49 +0000
Re: POWER trends, Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-27 13:47 +0000
Re: POWER trends, Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-27 17:27 +0000
byte order (was: POWER trends, Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-27 18:53 +0000
Power (was: Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-22 08:31 +0000
Re: Power (was: Concertina II Instead) quadi <quadibloc@ca.invalid> - 2026-03-26 20:00 +0000
Re: z, was Power (was: Concertina II Instead) John Levine <johnl@taugh.com> - 2026-03-27 01:20 +0000
Re: Power (was: Concertina II Instead) Thomas Koenig <tkoenig@netcologne.de> - 2026-03-27 07:21 +0000
Re: Power (was: Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-27 08:07 +0000
Re: System z cpu error recovery [was Power] EricP <ThatWouldBeTelling@thevillage.com> - 2026-03-27 09:08 -0400
Re: Power (was: Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-27 18:52 +0000
Re: Power (was: Concertina II Instead) Thomas Koenig <tkoenig@netcologne.de> - 2026-03-27 21:42 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-21 19:57 -0700
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-22 09:06 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-22 10:17 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-22 10:12 +0000
SPARC M8 (was: Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-21 16:44 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-24 04:09 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-25 11:24 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-17 19:12 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-03 13:22 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-03 11:47 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-04 05:59 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 16:38 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-05-06 18:58 +0100
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-07 23:15 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-05-11 15:34 +0100
x86s (was: Concertina II Instead) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-11 16:55 +0000
Re: x86s (was: Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-11 18:24 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-12 15:58 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-05-12 18:16 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-05-12 22:52 +0100
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-05-12 22:12 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-05-13 19:33 +0100
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-05-13 18:47 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-13 18:07 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-13 20:51 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-15 16:02 +0000
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-05-16 11:20 +0200
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-14 21:10 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-15 16:05 +0000
Re: 16 vs 32 bits, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-15 18:11 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-15 18:19 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-15 20:07 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-15 22:19 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-04 16:39 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-08 18:12 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-05-08 20:11 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-08 16:55 -0400
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-05-08 21:21 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-10 08:59 -0400
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-10 15:59 +0000
Re: VAX multiply, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-10 19:09 +0000
Re: VAX multiply, Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-11 12:20 -0400
Re: VAX multiply, Concertina II Instead John Levine <johnl@taugh.com> - 2026-05-11 16:58 +0000
Re: VAX multiply, Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-11 18:26 +0000
Re: VAX multiply, Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-14 13:27 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-12 15:35 -0400
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-12 20:22 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-12 17:47 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-15 13:54 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-15 11:30 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-15 17:08 +0000
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-05-10 16:23 -0400
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-11 07:47 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-11 18:16 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-11 09:02 -0400
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-05-11 16:21 +0200
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-12 07:54 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-09 17:07 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-10 10:54 -0400
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-05-10 16:05 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-05-09 19:41 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-11 14:44 -0400
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-05-11 20:51 +0000
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-05-15 09:03 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-10 16:57 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-11 02:04 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-15 02:26 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-15 17:55 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-15 19:42 +0000
Re: emulation on the 360, Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-15 20:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-15 20:42 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-03-17 20:18 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-17 20:28 +0000
Re: Concertina II Instead Tim Rentsch <tr.17687@z991.linuxsc.com> - 2026-03-18 00:18 -0700
Re: Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-18 17:35 +0000
Re: Concertina II Instead Tim Rentsch <tr.17687@z991.linuxsc.com> - 2026-03-23 21:10 -0700
Re: Concertina II Instead EricP <ThatWouldBeTelling@thevillage.com> - 2026-03-17 17:09 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-17 21:43 +0000
Re: microcode, Concertina II Instead John Levine <johnl@taugh.com> - 2026-03-17 22:07 +0000
Re: microcode, Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-17 18:52 -0700
Re: microcode, Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-03-18 15:01 +0000
Re: microcode, Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-18 16:01 +0000
Re: microcode, Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-03-18 16:56 +0000
Re: microcode, Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-18 18:24 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-03-18 01:08 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-17 18:59 -0700
Re: Concertina II Instead Tim Rentsch <tr.17687@z991.linuxsc.com> - 2026-03-18 00:21 -0700
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-22 11:22 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-23 19:16 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-23 14:36 -0500
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-03-23 15:52 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-23 17:38 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-24 11:40 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-24 14:35 -0500
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-24 13:48 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-24 18:09 -0500
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-24 16:33 -0700
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-25 01:21 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-24 18:37 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-25 02:47 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-25 18:31 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-25 13:59 -0700
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-25 23:12 +0200
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-25 16:29 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-26 20:29 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-27 03:32 +0300
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-27 12:45 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-03-27 16:54 +0300
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-27 18:56 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-27 14:31 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-28 11:54 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-28 13:56 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-27 21:38 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-27 20:59 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-03-28 02:21 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-28 04:09 -0500
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-03-28 19:23 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-28 20:47 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-30 03:47 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-30 03:50 +0000
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-03-31 12:21 -0400
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-01 07:49 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-01 19:14 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-27 18:50 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-03-28 08:41 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-27 14:25 -0500
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-25 16:13 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-25 18:03 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-24 19:19 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-24 17:40 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-25 01:20 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-15 16:53 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 02:09 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 02:37 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 02:51 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-16 05:20 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 13:24 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 18:43 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 21:44 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-08 20:44 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-08 17:20 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-09 02:53 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-09 03:29 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-08 05:13 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 22:09 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 22:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-16 23:46 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-17 00:06 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-17 08:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-17 15:36 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-03-17 09:09 -0700
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-17 18:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-18 01:41 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-18 16:00 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-19 05:13 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-19 22:24 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-20 02:20 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-03-20 19:29 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-03-20 16:56 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-21 04:44 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-01 07:58 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-01 14:53 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 04:12 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 05:51 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 07:04 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 23:35 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 17:54 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-03 14:47 +0100
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-03 15:08 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 16:28 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-03 19:48 +0100
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 20:37 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-03 22:03 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 23:45 +0000
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-04 13:29 +0100
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 14:29 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 14:51 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 15:40 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-04 15:59 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 19:36 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-06 23:17 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 14:20 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 14:50 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 15:25 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-07 16:59 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-08 20:25 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-09 01:27 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-09 02:24 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-12 04:40 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-12 18:18 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-13 19:41 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-13 21:37 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-14 12:48 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:08 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-14 22:31 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-15 15:12 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-17 04:49 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-17 05:21 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-17 21:33 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-20 17:17 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-15 02:53 -0500
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-04 22:53 +0100
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 23:49 +0000
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-04-05 03:15 +0000
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-04-05 09:38 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-04-05 13:52 +0300
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-04-05 13:48 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-04-05 18:34 +0300
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-05 12:43 +0100
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-04-05 14:30 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-06 01:16 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-06 16:33 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-06 16:22 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-06 22:41 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-06 23:31 -0400
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 04:48 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-07 03:12 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 10:24 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-07 13:23 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-07 19:32 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-07 14:52 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-08 19:50 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-08 15:03 -0500
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-08 15:15 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-08 23:34 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-09 17:35 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-09 15:44 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-10 01:11 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-09 21:09 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 01:41 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-11 01:45 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 07:32 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-11 13:41 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 19:22 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-12 06:42 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-12 07:24 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-12 06:55 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-12 12:33 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-12 12:18 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-12 11:22 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-12 16:52 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-12 18:09 +0000
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-11 07:28 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-11 13:01 -0500
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-12 10:12 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-13 15:51 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-13 21:11 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-13 17:07 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-13 18:36 -0400
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 01:19 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-13 22:50 -0400
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-14 05:31 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-14 09:07 -0400
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:11 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-14 00:51 -0500
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-14 06:00 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-14 03:09 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-14 08:30 -0400
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 14:34 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:07 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 19:05 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 14:32 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-14 16:18 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:13 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 19:07 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 19:30 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-15 02:53 -0500
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-15 21:22 +0200
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-15 21:14 +0200
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-14 16:35 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-14 16:14 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 00:44 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-14 21:24 -0500
Re: Concertina II Instead moi <findlaybill@blueyonder.co.uk> - 2026-04-15 03:32 +0100
Re: Machineguns [was re: Concertina II Instead] cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 11:30 +0000
Re: Machineguns [was re: Concertina II Instead] David Brown <david.brown@hesbynett.no> - 2026-04-15 15:48 +0200
Re: Machineguns [was re: Concertina II Instead] cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 13:56 +0000
Re: Machineguns [was re: Concertina II Instead] scott@slp53.sl.home (Scott Lurndal) - 2026-04-15 14:34 +0000
Re: Machineguns [was re: Concertina II Instead] cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 16:25 +0000
Re: Machineguns [was re: Concertina II Instead] MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 17:54 +0000
Re: Machineguns [was re: Concertina II Instead] cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 18:48 +0000
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 14:59 -0700
Re: Machineguns [was re: Concertina II Instead] Andy Valencia <vandys@vsta.org> - 2026-04-15 09:52 -0700
Re: Machineguns [was re: Concertina II Instead] MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 19:24 +0000
Re: Machineguns [was re: Concertina II Instead] scott@slp53.sl.home (Scott Lurndal) - 2026-04-15 20:00 +0000
Re: Machineguns [was re: Concertina II Instead] MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-16 17:27 +0000
Re: Machineguns [was re: Concertina II Instead] Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-15 21:45 +0200
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 13:01 -0700
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 13:16 -0700
Re: Machineguns [was re: Concertina II Instead] Thomas Koenig <tkoenig@netcologne.de> - 2026-04-15 20:28 +0000
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 20:12 -0700
Re: Machineguns [was re: Concertina II Instead] Thomas Koenig <tkoenig@netcologne.de> - 2026-04-16 05:27 +0000
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 23:55 -0700
Re: Machineguns [was re: Concertina II Instead] MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-16 17:39 +0000
Re: Machineguns [was re: Concertina II Instead] "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 13:19 -0700
Re: Machineguns [was re: Concertina II Instead] Thomas Koenig <tkoenig@netcologne.de> - 2026-04-17 05:37 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-15 15:36 +0000
Re: far, far, away from Concertina II Instead John Levine <johnl@taugh.com> - 2026-04-15 16:44 +0000
Re: far, far, away from Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 17:57 +0000
Re: far, far, away from Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-15 18:22 +0000
Re: far, far, away from Concertina II Instead John Levine <johnl@taugh.com> - 2026-04-15 21:15 +0000
Gate delays (was: far, far, away from Concertina II Instead) Thomas Koenig <tkoenig@netcologne.de> - 2026-04-17 21:38 +0000
Re: Gate delays (was: far, far, away from Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-18 01:11 +0000
Re: Gate delays EricP <ThatWouldBeTelling@thevillage.com> - 2026-04-18 13:01 -0400
Re: Gate delays MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-18 17:59 +0000
Re: Gate delays EricP <ThatWouldBeTelling@thevillage.com> - 2026-04-19 14:37 -0400
Re: Gate delays MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-19 21:39 +0000
Re: Gate delays Thomas Koenig <tkoenig@netcologne.de> - 2026-04-18 19:23 +0000
Re: Gate delays EricP <ThatWouldBeTelling@thevillage.com> - 2026-04-19 16:04 -0400
Re: Gate delays MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-19 21:48 +0000
Re: Gate delays Thomas Koenig <tkoenig@netcologne.de> - 2026-04-20 17:47 +0000
Re: Gate delays Paul Clayton <paaronclayton@gmail.com> - 2026-04-22 00:00 -0400
Re: Gate delays MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-22 18:19 +0000
Re: far, far, away from Concertina II Instead Tim Rentsch <tr.17687@z991.linuxsc.com> - 2026-04-18 20:51 -0700
Re: far, far, away from Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-19 18:18 +0000
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-15 21:55 +0200
Re: Concertina II Instead Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-04-15 23:44 +0100
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-16 13:15 -0500
Re: Concertina II Instead "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 13:46 -0700
Re: Concertina II Instead Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-04-16 23:00 +0100
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-16 18:53 -0500
Re: Concertina II Instead Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-04-17 13:09 +0100
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-17 13:13 -0500
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-17 02:06 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-16 22:09 -0500
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-17 08:05 +0200
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-17 02:20 -0500
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-17 14:18 +0200
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-17 16:07 +0200
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-17 16:57 +0200
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-17 17:30 +0200
Re: Concertina II Instead anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-04-17 08:51 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-04-17 15:05 +0300
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-17 14:47 +0200
Re: Concertina II Instead Bill Findlay <findlaybill@blueyonder.co.uk> - 2026-04-17 13:11 +0100
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-17 15:01 +0200
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-17 12:37 -0500
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-18 10:56 +0200
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-18 15:05 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-18 21:02 +0000
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-04-19 01:08 +0300
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-18 21:04 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-19 03:54 -0500
Re: Concertina II Instead Michael S <already5chosen@yahoo.com> - 2026-04-19 12:28 +0300
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-19 14:14 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-19 21:47 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-19 18:04 -0500
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-19 22:47 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-20 01:08 -0500
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-18 11:11 +0200
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-18 11:37 +0200
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-18 10:08 +0000
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-18 14:18 +0200
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-17 15:45 +0000
Gun control (Was Re: Concertina II Instead) Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-15 21:33 +0200
Re: Gun control (Was Re: Concertina II Instead) David Brown <david.brown@hesbynett.no> - 2026-04-15 22:00 +0200
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 13:19 -0700
Re: Gun control (Was Re: Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-16 17:31 +0000
Re: Gun control (Was Re: Concertina II Instead) Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-16 19:46 +0200
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 13:26 -0700
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 13:34 -0700
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-16 18:39 +0000
Re: Gun control (Was Re: Concertina II Instead) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-16 20:49 +0000
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 20:35 +0000
Re: Gun control (Was Re: Concertina II Instead) David Brown <david.brown@hesbynett.no> - 2026-04-16 11:35 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-16 11:59 +0000
Re: Gun control (Was Re: Concertina II Instead) David Brown <david.brown@hesbynett.no> - 2026-04-16 16:27 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-16 16:31 +0000
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-16 17:37 +0000
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-16 18:06 +0000
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-16 18:52 +0000
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-16 20:09 +0000
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-17 00:12 +0000
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-19 00:49 +0000
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 13:44 -0700
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-17 00:13 +0000
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 19:08 -0700
Re: Gun control (Was Re: Concertina II Instead) scott@slp53.sl.home (Scott Lurndal) - 2026-04-17 15:55 +0000
Re: Gun control (Was Re: Concertina II Instead) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-16 19:09 -0700
Re: Gun control (Was Re: Concertina II Instead) David Brown <david.brown@hesbynett.no> - 2026-04-17 08:45 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-19 01:02 +0000
Re: Gun control (Was Re: Concertina II Instead) David Brown <david.brown@hesbynett.no> - 2026-04-19 12:56 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-19 13:35 +0000
Re: Gun control (Was Re: Concertina II Instead) Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-19 17:50 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-19 19:04 +0000
Re: Gun control (Was Re: Concertina II Instead) Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-16 19:36 +0200
Re: Gun control (Was Re: Concertina II Instead) cross@spitfire.i.gajendra.net (Dan Cross) - 2026-04-15 20:22 +0000
Re: Concertina II Instead "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-04-15 22:05 -0700
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:04 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 17:56 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-14 18:01 +0000
Re: Concertina II Instead David Brown <david.brown@hesbynett.no> - 2026-04-15 10:48 +0200
Re: Concertina II Instead Terje Mathisen <terje.mathisen@tmsw.no> - 2026-04-15 21:19 +0200
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 14:30 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-14 16:21 +0000
Re: Concertina II Instead scott@slp53.sl.home (Scott Lurndal) - 2026-04-14 17:09 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 18:15 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-14 20:11 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 00:38 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-15 17:43 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-15 19:07 +0000
Re: Concertina II Instead Thomas Koenig <tkoenig@netcologne.de> - 2026-04-15 20:23 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-14 16:13 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-14 14:31 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-14 17:54 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 19:35 -0400
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 20:24 -0400
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-12 10:45 -0700
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-11 12:26 -0500
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-11 17:47 +0000
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-11 19:52 -0400
Re: Concertina II Instead Robert Finch <robfi680@gmail.com> - 2026-04-07 07:11 -0400
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-07 04:49 +0000
Re: Concertina II Instead Stefan Monnier <monnier@iro.umontreal.ca> - 2026-04-07 09:20 -0400
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-07 14:31 -0500
Re: Concertina II Instead antispam@fricas.org (Waldek Hebisch) - 2026-04-12 19:28 +0000
Re: Concertina II Instead BGB <cr88192@gmail.com> - 2026-04-12 17:01 -0500
Re: Concertina II Instead jgd@cix.co.uk (John Dallman) - 2026-04-03 17:34 +0100
Re: Concertina II Instead Stephen Fuld <sfuld@alumni.cmu.edu.invalid> - 2026-04-03 07:53 -0700
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-03 16:00 +0000
Re: Concertina II Instead MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-04-03 14:58 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-04-04 14:27 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-25 07:50 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-26 11:02 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-26 11:16 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-31 00:53 +0000
Re: Concertina II Instead quadi <quadibloc@ca.invalid> - 2026-03-31 13:11 +0000
Page 13 of 30 — ← Prev page 1 … 11 12 [13] 14 15 … 30 Next page →
| From | quadi <quadibloc@ca.invalid> |
|---|---|
| Date | 2026-03-15 20:42 +0000 |
| Message-ID | <10p75jk$1dmen$1@dont-email.me> |
| In reply to | #115350 |
On Sun, 15 Mar 2026 19:42:00 +0000, John Dallman wrote: > One of the engineers realised than since they were using 36-bit-wide > memory and CPU data path, for 4x8-bit bytes, each with parity, it was > possible to write an efficient emulator for the IBM 7090 in microcode on > the 360 model 65. I remember reading the manuals on Bitsavers for several 360 emulation options. I don't recall any 7090 emulator which involved turning memory parity off in order for it to work! John Savard
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| From | jgd@cix.co.uk (John Dallman) |
|---|---|
| Date | 2026-03-17 20:18 +0000 |
| Message-ID | <memo.20260317201844.4612I@jgd.cix.co.uk> |
| In reply to | #115354 |
In article <10p75jk$1dmen$1@dont-email.me>, quadibloc@ca.invalid (quadi) wrote: > I remember reading the manuals on Bitsavers for several 360 > emulation options. I don't recall any 7090 emulator which involved > turning memory parity off in order for it to work! Think about it. If this is possible, the parity checks must be implemented by microcode. The 360s were built out of hundreds of small circuit cards with discrete components on them. Those included very low-integrated circuits, with maybe 10 transistors at most. The orders to the designers of the different models were to microcode everything, unless they could improve price:performance by 30% or more with dedicated circuitry. The microcoded world lasted until the RISC revolution of the 1980s, when integrated circuits were providing at least 10,000 times more transistors. John
[toc] | [prev] | [next] | [standalone]
| From | quadi <quadibloc@ca.invalid> |
|---|---|
| Date | 2026-03-17 20:28 +0000 |
| Message-ID | <10pcdgj$386c5$1@dont-email.me> |
| In reply to | #115390 |
On Tue, 17 Mar 2026 20:18:00 +0000, John Dallman wrote: > Think about it. If this is possible, the parity checks must be > implemented by microcode. It is true that nearly all System/360 models, except the Model 75 and the 91/95/195, were microcoded. I would have expected memory parity to be done in hardware, however. Hardware features can be turned off, and emulation features did sometimes involve installing new hardware, not just new microcode. But in the 7090 emulation features for which I have read documentation, none did it this way. John Savard
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| From | Tim Rentsch <tr.17687@z991.linuxsc.com> |
|---|---|
| Date | 2026-03-18 00:18 -0700 |
| Message-ID | <86cy1161wi.fsf@linuxsc.com> |
| In reply to | #115391 |
quadi <quadibloc@ca.invalid> writes: > On Tue, 17 Mar 2026 20:18:00 +0000, John Dallman wrote: > >> Think about it. If this is possible, the parity checks must be >> implemented by microcode. > > It is true that nearly all System/360 models, except the Model 75 and the > 91/95/195, were microcoded. There was also the 360/44 if I am not mistaken.
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| From | John Levine <johnl@taugh.com> |
|---|---|
| Date | 2026-03-18 17:35 +0000 |
| Message-ID | <10penpl$2qr1$1@gal.iecc.com> |
| In reply to | #115410 |
According to Tim Rentsch <tr.17687@z991.linuxsc.com>: >quadi <quadibloc@ca.invalid> writes: > >> On Tue, 17 Mar 2026 20:18:00 +0000, John Dallman wrote: >> >>> Think about it. If this is possible, the parity checks must be >>> implemented by microcode. >> >> It is true that nearly all System/360 models, except the Model 75 and the >> 91/95/195, were microcoded. > >There was also the 360/44 if I am not mistaken. The 360/44 was an odd machine with a hardware implmentation of a scientific subset of the 360's instruction set. It had optional priority interrupt and a high speed direct data channel intended for real-time data acquisition and control. It also had a knob to control floating point precision, so you could get less accurate answers faster, which I suppose was intended to help tight time budgets in real-time calculations. I don't think they made very many of them. The 16-bit rack mounted 1800 was a lot more popular. -- Regards, John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies", Please consider the environment before reading this e-mail. https://jl.ly
[toc] | [prev] | [next] | [standalone]
| From | Tim Rentsch <tr.17687@z991.linuxsc.com> |
|---|---|
| Date | 2026-03-23 21:10 -0700 |
| Message-ID | <86mrzx50m9.fsf@linuxsc.com> |
| In reply to | #115422 |
John Levine <johnl@taugh.com> writes: > According to Tim Rentsch <tr.17687@z991.linuxsc.com>: > >> quadi <quadibloc@ca.invalid> writes: >> >>> On Tue, 17 Mar 2026 20:18:00 +0000, John Dallman wrote: >>> >>>> Think about it. If this is possible, the parity checks must be >>>> implemented by microcode. >>> >>> It is true that nearly all System/360 models, except the Model 75 and the >>> 91/95/195, were microcoded. >> >> There was also the 360/44 if I am not mistaken. > > The 360/44 was an odd machine with a hardware implmentation of a > scientific subset of the 360's instruction set. It had optional > priority interrupt and a high speed direct data channel intended for > real-time data acquisition and control. It also had a knob to control > floating point precision, so you could get less accurate answers > faster, which I suppose was intended to help tight time budgets in > real-time calculations. No question that the 360/44 was a niche model, and no doubt IBM considered it as such. > I don't think they made very many of them. The 16-bit rack mounted 1800 > was a lot more popular. I looked around for some numbers but didn't find any. It's likely they were targeted for particular kinds of environments. On the other hand IBM kept building and selling them until the early 1970s, when the 360 was superseded by the 370. Also as it turns out a 360/44 was the machine on which I first learned to program, in both Fortran and 360/assembler.
[toc] | [prev] | [next] | [standalone]
| From | EricP <ThatWouldBeTelling@thevillage.com> |
|---|---|
| Date | 2026-03-17 17:09 -0400 |
| Message-ID | <wqjuR.14707$1vW9.5340@fx09.iad> |
| In reply to | #115390 |
John Dallman wrote: > In article <10p75jk$1dmen$1@dont-email.me>, quadibloc@ca.invalid (quadi) > wrote: > >> I remember reading the manuals on Bitsavers for several 360 >> emulation options. I don't recall any 7090 emulator which involved >> turning memory parity off in order for it to work! > > Think about it. If this is possible, the parity checks must be > implemented by microcode. > > The 360s were built out of hundreds of small circuit cards with discrete > components on them. Those included very low-integrated circuits, with > maybe 10 transistors at most. The orders to the designers of the > different models were to microcode everything, unless they could improve > price:performance by 30% or more with dedicated circuitry. > > The microcoded world lasted until the RISC revolution of the 1980s, when > integrated circuits were providing at least 10,000 times more transistors. > > > John I was looking at the VAX-780 description of its cache, TLB, main memory bus called the Synchronous Backplane Interconnect (SBI), and memory controller, and was surprised to find them all directly controlled by microcode, not dedicated HW sequencers. I think this was for flexibility for easier handling of errors with microtraps (microcode exceptions). A consequence is that since there is only one microsequencer there is no HW concurrency and everything is sequential. "2.3.3.2 Microtraps During Memory Control Functions - During the execution of a memory control function, a microtrap may occur. Table 2-17 lists the possible microtraps for each memory control function. The conditions for each of these microtraps are given below. If a microtrap occurs during the execution of a memory control function, the reference is usually aborted. This is true for all microtraps except for the unaligned data microtrap and the Cache parity error microtrap. In the case of the unaligned data microtrap, the microtrap is executed as soon as all of the data of the aligned longword is accessed. For a Cache parity error microtrap, the reference is only aborted if it is a read reference. Otherwise, the function is executed regardless of the cache parity error." ... and it continues on to describe the various microtraps: TLB miss, protection violation, page crossing, unaligned data, odd address in PDP-11 mode, parity error in TLB, cache or SBI. It even uses a microtrap to handle setting the PTE's M or Modify bit and write the change back to memory.
[toc] | [prev] | [next] | [standalone]
| From | Thomas Koenig <tkoenig@netcologne.de> |
|---|---|
| Date | 2026-03-17 21:43 +0000 |
| Message-ID | <10pchut$39t1v$2@dont-email.me> |
| In reply to | #115390 |
John Dallman <jgd@cix.co.uk> schrieb: > In article <10p75jk$1dmen$1@dont-email.me>, quadibloc@ca.invalid (quadi) > wrote: > >> I remember reading the manuals on Bitsavers for several 360 >> emulation options. I don't recall any 7090 emulator which involved >> turning memory parity off in order for it to work! > > Think about it. If this is possible, the parity checks must be > implemented by microcode. > > The 360s were built out of hundreds of small circuit cards with discrete > components on them. Those included very low-integrated circuits, with > maybe 10 transistors at most. The orders to the designers of the > different models were to microcode everything, unless they could improve > price:performance by 30% or more with dedicated circuitry. > > The microcoded world lasted until the RISC revolution of the 1980s, when > integrated circuits were providing at least 10,000 times more transistors. The 801 demonstrated (within IBM) that RISC was possible in the second half of the 1970s. The key there were fast caches which were fast enough to replace microcode storage. Separation of I and D cache also played a role, of course, as did pipelinging. -- This USENET posting was made without artificial intelligence, artificial impertinence, artificial arrogance, artificial stupidity, artificial flavorings or artificial colorants.
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| From | John Levine <johnl@taugh.com> |
|---|---|
| Date | 2026-03-17 22:07 +0000 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <10pcjb6$1nep$1@gal.iecc.com> |
| In reply to | #115395 |
According to Thomas Koenig <tkoenig@netcologne.de>: >> The microcoded world lasted until the RISC revolution of the 1980s, when >> integrated circuits were providing at least 10,000 times more transistors. > >The 801 demonstrated (within IBM) that RISC was possible in the >second half of the 1970s. The key there were fast caches which >were fast enough to replace microcode storage. Separation of >I and D cache also played a role, of course, as did pipelinging. That's partly it but I think it was more that the 801 and the PL.8 compiler were developed together. They had the insight that if you decomposed complicated instructions into simpler ones, the compiler now could optimize them and some of those instructions were optimized away. It certainly didn't hurt that the 801's cache could provide an instruction every cycle so it was as fast as microcode would be. While the early FORTRAN compilers did optimizations that are still quite respectable, the other 1960s compilers were not very sophisticated and the instruction sets reflected that. For example, the 360's EDIT instructions are basically the COBOL picture formatter. -- Regards, John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies", Please consider the environment before reading this e-mail. https://jl.ly
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| From | Stephen Fuld <sfuld@alumni.cmu.edu.invalid> |
|---|---|
| Date | 2026-03-17 18:52 -0700 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <10pd0hb$3f2bm$1@dont-email.me> |
| In reply to | #115399 |
On 3/17/2026 3:07 PM, John Levine wrote: > According to Thomas Koenig <tkoenig@netcologne.de>: >>> The microcoded world lasted until the RISC revolution of the 1980s, when >>> integrated circuits were providing at least 10,000 times more transistors. >> >> The 801 demonstrated (within IBM) that RISC was possible in the >> second half of the 1970s. The key there were fast caches which >> were fast enough to replace microcode storage. Separation of >> I and D cache also played a role, of course, as did pipelinging. > > That's partly it but I think it was more that the 801 and the PL.8 > compiler were developed together. They had the insight that if you > decomposed complicated instructions into simpler ones, the compiler > now could optimize them and some of those instructions were > optimized away. It certainly didn't hurt that the 801's cache could > provide an instruction every cycle so it was as fast as microcode > would be. > > While the early FORTRAN compilers did optimizations that are still > quite respectable, the other 1960s compilers were not very > sophisticated and the instruction sets reflected that. For example, the > 360's EDIT instructions are basically the COBOL picture formatter. So the instruction set reflected the compiler's need for picture formatting, and optimized that. :-) -- - Stephen Fuld (e-mail address disguised to prevent spam)
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| From | scott@slp53.sl.home (Scott Lurndal) |
|---|---|
| Date | 2026-03-18 15:01 +0000 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <o7zuR.782568$wcP9.471912@fx24.iad> |
| In reply to | #115408 |
Stephen Fuld <sfuld@alumni.cmu.edu.invalid> writes: >On 3/17/2026 3:07 PM, John Levine wrote: >> According to Thomas Koenig <tkoenig@netcologne.de>: >>>> The microcoded world lasted until the RISC revolution of the 1980s, when >>>> integrated circuits were providing at least 10,000 times more transistors. >>> >>> The 801 demonstrated (within IBM) that RISC was possible in the >>> second half of the 1970s. The key there were fast caches which >>> were fast enough to replace microcode storage. Separation of >>> I and D cache also played a role, of course, as did pipelinging. >> >> That's partly it but I think it was more that the 801 and the PL.8 >> compiler were developed together. They had the insight that if you >> decomposed complicated instructions into simpler ones, the compiler >> now could optimize them and some of those instructions were >> optimized away. It certainly didn't hurt that the 801's cache could >> provide an instruction every cycle so it was as fast as microcode >> would be. >> >> While the early FORTRAN compilers did optimizations that are still >> quite respectable, the other 1960s compilers were not very >> sophisticated and the instruction sets reflected that. For example, the >> 360's EDIT instructions are basically the COBOL picture formatter. > >So the instruction set reflected the compiler's need for picture >formatting, and optimized that. :-) The contemporaneous Burroughs B3500 also had an instruction (EDT) for picture formatting. "The Edit instruction moves digits or characters (depending on the **A** address controller) from the **A** field to the **C** field under control of the edit-operators in the **B** field. Characters may be moved, inserted or deleted according to the edit-operators. Data movement and editing are stopped by the exhaustion of edit-operators in the **B** field." The edit instruction uses an edit table that is located in memory locations **48**-**63** relative to Base #0. This table may be initialized to any desired set of insertion characters. By convention all compilers build a default insertion table containing: ^ Entry # ^ Base 0 Address ^ Character ^ Description ^ ^ 0 | 48 | **+** | Positive Sign | ^ 1 | 50 | **-** | Negative Sign | ^ 2 | 52 | ***** | Check Suppress Character | ^ 3 | 54 | **.** | Decimal Point | ^ 4 | 56 | **,** | Thousands Separator | ^ 5 | 58 | **$** | Currency Symbol | ^ 6 | 60 | **0** | Leading zero fill Character | ^ 7 | 62 | <blank> | Blank Fill Character |
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| From | MitchAlsup <user5857@newsgrouper.org.invalid> |
|---|---|
| Date | 2026-03-18 16:01 +0000 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <1773849702-5857@newsgrouper.org> |
| In reply to | #115408 |
Stephen Fuld <sfuld@alumni.cmu.edu.invalid> posted: > On 3/17/2026 3:07 PM, John Levine wrote: > > According to Thomas Koenig <tkoenig@netcologne.de>: > >>> The microcoded world lasted until the RISC revolution of the 1980s, when > >>> integrated circuits were providing at least 10,000 times more transistors. > >> > >> The 801 demonstrated (within IBM) that RISC was possible in the > >> second half of the 1970s. The key there were fast caches which > >> were fast enough to replace microcode storage. Separation of > >> I and D cache also played a role, of course, as did pipelinging. > > > > That's partly it but I think it was more that the 801 and the PL.8 > > compiler were developed together. They had the insight that if you > > decomposed complicated instructions into simpler ones, the compiler > > now could optimize them and some of those instructions were > > optimized away. It certainly didn't hurt that the 801's cache could > > provide an instruction every cycle so it was as fast as microcode > > would be. > > > > While the early FORTRAN compilers did optimizations that are still > > quite respectable, the other 1960s compilers were not very > > sophisticated and the instruction sets reflected that. For example, the > > 360's EDIT instructions are basically the COBOL picture formatter. > > So the instruction set reflected the compiler's need for picture > formatting, and optimized that. :-) > s/compiler's/COBOL's/ > > >
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| From | scott@slp53.sl.home (Scott Lurndal) |
|---|---|
| Date | 2026-03-18 16:56 +0000 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <ROAuR.341143$ET1.178964@fx01.iad> |
| In reply to | #115418 |
MitchAlsup <user5857@newsgrouper.org.invalid> writes: > >Stephen Fuld <sfuld@alumni.cmu.edu.invalid> posted: > >> On 3/17/2026 3:07 PM, John Levine wrote: >> > According to Thomas Koenig <tkoenig@netcologne.de>: >> >>> The microcoded world lasted until the RISC revolution of the 1980s, when >> >>> integrated circuits were providing at least 10,000 times more transistors. >> >> >> >> The 801 demonstrated (within IBM) that RISC was possible in the >> >> second half of the 1970s. The key there were fast caches which >> >> were fast enough to replace microcode storage. Separation of >> >> I and D cache also played a role, of course, as did pipelinging. >> > >> > That's partly it but I think it was more that the 801 and the PL.8 >> > compiler were developed together. They had the insight that if you >> > decomposed complicated instructions into simpler ones, the compiler >> > now could optimize them and some of those instructions were >> > optimized away. It certainly didn't hurt that the 801's cache could >> > provide an instruction every cycle so it was as fast as microcode >> > would be. >> > >> > While the early FORTRAN compilers did optimizations that are still >> > quite respectable, the other 1960s compilers were not very >> > sophisticated and the instruction sets reflected that. For example, the >> > 360's EDIT instructions are basically the COBOL picture formatter. >> >> So the instruction set reflected the compiler's need for picture >> formatting, and optimized that. :-) >> >s/compiler's/COBOL's/ and RPG
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| From | MitchAlsup <user5857@newsgrouper.org.invalid> |
|---|---|
| Date | 2026-03-18 18:24 +0000 |
| Subject | Re: microcode, Concertina II Instead |
| Message-ID | <1773858252-5857@newsgrouper.org> |
| In reply to | #115421 |
scott@slp53.sl.home (Scott Lurndal) posted: > MitchAlsup <user5857@newsgrouper.org.invalid> writes: > > > >Stephen Fuld <sfuld@alumni.cmu.edu.invalid> posted: > > > >> On 3/17/2026 3:07 PM, John Levine wrote: > >> > According to Thomas Koenig <tkoenig@netcologne.de>: > >> >>> The microcoded world lasted until the RISC revolution of the 1980s, when > >> >>> integrated circuits were providing at least 10,000 times more transistors. > >> >> > >> >> The 801 demonstrated (within IBM) that RISC was possible in the > >> >> second half of the 1970s. The key there were fast caches which > >> >> were fast enough to replace microcode storage. Separation of > >> >> I and D cache also played a role, of course, as did pipelinging. > >> > > >> > That's partly it but I think it was more that the 801 and the PL.8 > >> > compiler were developed together. They had the insight that if you > >> > decomposed complicated instructions into simpler ones, the compiler > >> > now could optimize them and some of those instructions were > >> > optimized away. It certainly didn't hurt that the 801's cache could > >> > provide an instruction every cycle so it was as fast as microcode > >> > would be. > >> > > >> > While the early FORTRAN compilers did optimizations that are still > >> > quite respectable, the other 1960s compilers were not very > >> > sophisticated and the instruction sets reflected that. For example, the > >> > 360's EDIT instructions are basically the COBOL picture formatter. > >> > >> So the instruction set reflected the compiler's need for picture > >> formatting, and optimized that. :-) > >> > >s/compiler's/COBOL's/ > > and RPG > and PL/1
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| From | antispam@fricas.org (Waldek Hebisch) |
|---|---|
| Date | 2026-03-18 01:08 +0000 |
| Message-ID | <10pctv6$32qbl$1@paganini.bofh.team> |
| In reply to | #115395 |
Thomas Koenig <tkoenig@netcologne.de> wrote:
> John Dallman <jgd@cix.co.uk> schrieb:
>> In article <10p75jk$1dmen$1@dont-email.me>, quadibloc@ca.invalid (quadi)
>> wrote:
>>
>>> I remember reading the manuals on Bitsavers for several 360
>>> emulation options. I don't recall any 7090 emulator which involved
>>> turning memory parity off in order for it to work!
>>
>> Think about it. If this is possible, the parity checks must be
>> implemented by microcode.
>>
>> The 360s were built out of hundreds of small circuit cards with discrete
>> components on them. Those included very low-integrated circuits, with
>> maybe 10 transistors at most. The orders to the designers of the
>> different models were to microcode everything, unless they could improve
>> price:performance by 30% or more with dedicated circuitry.
>>
>> The microcoded world lasted until the RISC revolution of the 1980s, when
>> integrated circuits were providing at least 10,000 times more transistors.
>
> The 801 demonstrated (within IBM) that RISC was possible in the
> second half of the 1970s. The key there were fast caches which
> were fast enough to replace microcode storage. Separation of
> I and D cache also played a role, of course, as did pipelinging.
Tanenbaum in his book about computer architecture mentions results
of Bell and Newell from 1971. IIUC Bell and Newell coded
some programs in microcode of 2025 (microcode engine of 360/25).
Claim is that such program run 45 times faster than program
using 360 instruction set. They also created Fortran compiler/
interpreter combination with interpreter coded in 2025
microcode. They claimed that this Fortran run at comparable
speed as "native" Fortran on 360/50.
One can make different conclusion from this. Like Tanenbaum you
can claim that there is need for more specialized microcode.
But you can also realize that by making samer version of microcode
level and allowing compilers to target it (possibly via specialized
interpreter) one can gain a lot of performance. The second things
leads to RISC-like designs.
I think that in 1970 designers knew that if machine is simple
enough, then hardwired design will be faster than microcoded
one. But if for compatibility reasons one had to implement
design that was too complex to directly implement in available
hardware, then microcoded thesign had advantage. And ability
to offer "the same" architecture on machines of varying sizes
was seen as big advantage.
AFAICS at least part of motivation for microcode was realization
that hardware could be made simpler and perform better if matched
with appropriate software. But simpler and presumably cheaper
hardware would mean less money to hardware folks and more to
software vendors. Microcode was a way for hardware vendors to
get bigger part of the pie, by doing thing that otherwise
software folks would do.
So, I think that technical people realized around 1971 that
RISC-like apprach could be technically superior, but for
several follownig years microcode had business advantage.
--
Waldek Hebisch
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| From | Stephen Fuld <sfuld@alumni.cmu.edu.invalid> |
|---|---|
| Date | 2026-03-17 18:59 -0700 |
| Message-ID | <10pd0tk$3f5fk$1@dont-email.me> |
| In reply to | #115406 |
On 3/17/2026 6:08 PM, Waldek Hebisch wrote: > Thomas Koenig <tkoenig@netcologne.de> wrote: >> John Dallman <jgd@cix.co.uk> schrieb: >>> In article <10p75jk$1dmen$1@dont-email.me>, quadibloc@ca.invalid (quadi) >>> wrote: >>> >>>> I remember reading the manuals on Bitsavers for several 360 >>>> emulation options. I don't recall any 7090 emulator which involved >>>> turning memory parity off in order for it to work! >>> >>> Think about it. If this is possible, the parity checks must be >>> implemented by microcode. >>> >>> The 360s were built out of hundreds of small circuit cards with discrete >>> components on them. Those included very low-integrated circuits, with >>> maybe 10 transistors at most. The orders to the designers of the >>> different models were to microcode everything, unless they could improve >>> price:performance by 30% or more with dedicated circuitry. >>> >>> The microcoded world lasted until the RISC revolution of the 1980s, when >>> integrated circuits were providing at least 10,000 times more transistors. >> >> The 801 demonstrated (within IBM) that RISC was possible in the >> second half of the 1970s. The key there were fast caches which >> were fast enough to replace microcode storage. Separation of >> I and D cache also played a role, of course, as did pipelinging. > > Tanenbaum in his book about computer architecture mentions results > of Bell and Newell from 1971. IIUC Bell and Newell coded > some programs in microcode of 2025 (microcode engine of 360/25). > Claim is that such program run 45 times faster than program > using 360 instruction set. They also created Fortran compiler/ > interpreter combination with interpreter coded in 2025 > microcode. They claimed that this Fortran run at comparable > speed as "native" Fortran on 360/50. > > One can make different conclusion from this. Like Tanenbaum you > can claim that there is need for more specialized microcode. > But you can also realize that by making samer version of microcode > level and allowing compilers to target it (possibly via specialized > interpreter) one can gain a lot of performance. The second things > leads to RISC-like designs. > > I think that in 1970 designers knew that if machine is simple > enough, then hardwired design will be faster than microcoded > one. But if for compatibility reasons one had to implement > design that was too complex to directly implement in available > hardware, then microcoded thesign had advantage. And ability > to offer "the same" architecture on machines of varying sizes > was seen as big advantage. > > AFAICS at least part of motivation for microcode was realization > that hardware could be made simpler and perform better if matched > with appropriate software. But simpler and presumably cheaper > hardware would mean less money to hardware folks and more to > software vendors. But back in the late 1960s and 70s, the hardware vendors gave the basic software, i.e. OS, compilers, utilities, away for free. > Microcode was a way for hardware vendors to > get bigger part of the pie, by doing thing that otherwise > software folks would do. > > So, I think that technical people realized around 1971 that > RISC-like apprach could be technically superior, but for > several follownig years microcode had business advantage. And in that time period, backward compatibility was becoming important, so new architectures had that hurdle to overcome. > -- - Stephen Fuld (e-mail address disguised to prevent spam)
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| From | Tim Rentsch <tr.17687@z991.linuxsc.com> |
|---|---|
| Date | 2026-03-18 00:21 -0700 |
| Message-ID | <868qbp61su.fsf@linuxsc.com> |
| In reply to | #115409 |
Stephen Fuld <sfuld@alumni.cmu.edu.invalid> writes: [...] > And in that time period, backward compatibility was becoming > important, so new architectures had that hurdle to overcome. When I first saw this I misread it as hackward compatibility. :)
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| From | Thomas Koenig <tkoenig@netcologne.de> |
|---|---|
| Date | 2026-03-22 11:22 +0000 |
| Message-ID | <10pojds$37ape$1@dont-email.me> |
| In reply to | #115406 |
Waldek Hebisch <antispam@fricas.org> schrieb: > Tanenbaum in his book about computer architecture mentions results > of Bell and Newell from 1971. IIUC Bell and Newell coded > some programs in microcode of 2025 (microcode engine of 360/25). > Claim is that such program run 45 times faster than program > using 360 instruction set. According to the Wikipedia article, the 360/25 had 64 bytes of high-speed (SLT) memory with an access time of 180 ns, five times as fast as main memory (or the usual microcode control store). That makes the factor of 45 just borderline believable, but still something that would later go away with higher-speed memory. > They also created Fortran compiler/ > interpreter combination with interpreter coded in 2025 > microcode. They claimed that this Fortran run at comparable > speed as "native" Fortran on 360/50. Ah, that's where the people who furnished the Fountainhead project at Data General got their ideas about programming-language dependent microcode from. -- This USENET posting was made without artificial intelligence, artificial impertinence, artificial arrogance, artificial stupidity, artificial flavorings or artificial colorants.
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| From | quadi <quadibloc@ca.invalid> |
|---|---|
| Date | 2026-03-23 19:16 +0000 |
| Message-ID | <10ps3hn$dqhi$1@dont-email.me> |
| In reply to | #115509 |
On Sun, 22 Mar 2026 11:22:36 +0000, Thomas Koenig wrote: > Ah, that's where the people who furnished the Fountainhead project at > Data General got their ideas about programming-language dependent > microcode from. IBM did do a lot of things connected with making their computers more powerful by doing stuff in microcode. Much better known than the 360/25 FORTRAN was a project to implement APL in microcode. John Savard
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| From | BGB <cr88192@gmail.com> |
|---|---|
| Date | 2026-03-23 14:36 -0500 |
| Message-ID | <10ps4nf$dv27$1@dont-email.me> |
| In reply to | #115523 |
On 3/23/2026 2:16 PM, quadi wrote:
> On Sun, 22 Mar 2026 11:22:36 +0000, Thomas Koenig wrote:
>
>> Ah, that's where the people who furnished the Fountainhead project at
>> Data General got their ideas about programming-language dependent
>> microcode from.
>
> IBM did do a lot of things connected with making their computers more
> powerful by doing stuff in microcode. Much better known than the 360/25
> FORTRAN was a project to implement APL in microcode.
>
I am ending up on a similar sort of path, but it is more:
Turn various annoying/expensive edge cases in RISC-V into trap handlers.
Or, say:
Slaps hood of RISC-V;
"You wouldn't believe how many non-free but rarely encountered and
essentially useless edge cases we fit in there".
Like, in some cases, it may make sense to impose limits on what is
allowed, and don't allow something unless allowing it actually has a
meaningful value-added.
But, it sort of represents a transition of sorts:
Early on: Every instruction in the ISA needs to actually work in full;
Adds RISC-V, ends up hard-wiring everything, and it pays some cost;
Recent: Starts pruning stuff back, better to just trap...
And, maybe emulate if it "does actually happen in practice".
But, often it doesn't actually happen in practice,
but the cost of allowing for it in hardware is non-zero.
...
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