Re: Pseudo-atomic - atomic operations that can fail

Message-ID	<4F59595B.8040607@SPAM.comp-arch.net> (permalink)
Date	2012-03-08 17:14 -0800
From	"Andy (Super) Glew" <andy@SPAM.comp-arch.net>
Organization	comp-arch.net
Newsgroups	comp.arch
Subject	Re: Pseudo-atomic - atomic operations that can fail
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On 3/8/2012 11:09 AM, MitchAlsup wrote:
> On Thursday, March 8, 2012 12:51:05 AM UTC-6, Andy (Super) Glew wrote:
>> On 3/7/2012 9:59 AM, MitchAlsup wrote:
>>> Pseudo atomicity is the only way to extend the instruction set so that one can encode atomic activities that require more than 2 unique memory references and some bookeeping instructions between the starting of the atomic event and the completion thereof.
>
>> I believe that I have just discovered a way to prove your statement wrong.
>
> Do I need to add the phrase: "without cluttering up the instruction set" to the previous?
>
> Mitch

No. I believe I have a much more scalable form of Hardware Transactional 
Memory.

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Pseudo-atomic - atomic operations that can fail "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-03-06 20:23 -0800
  Re: Pseudo-atomic - atomic operations that can fail MitchAlsup <MitchAlsup@aol.com> - 2012-03-07 09:59 -0800
    Re: Pseudo-atomic - atomic operations that can fail "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-03-07 22:51 -0800
      Re: Pseudo-atomic - atomic operations that can fail MitchAlsup <MitchAlsup@aol.com> - 2012-03-08 11:09 -0800
        Re: Pseudo-atomic - atomic operations that can fail "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-03-08 17:14 -0800

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