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| Message-ID | <4F38753D.7090205@SPAM.comp-arch.net> (permalink) |
|---|---|
| Date | 2012-02-12 18:28 -0800 |
| From | "Andy (Super) Glew" <andy@SPAM.comp-arch.net> |
| Organization | comp-arch.net |
| Newsgroups | comp.arch |
| Subject | Re: Trace of CPU Instruction Reordering |
| References | <f34bb706-2a57-4d1c-a198-ee211578295a@og8g2000pbb.googlegroups.com> |
On 2/12/2012 6:04 PM, Ripunjay Tripathi wrote: > I have studied a few things about instruction re-ordering by > processors and Tomasulo's algorithm. > > In an attempt to understand this topic bit more I want to know if > there is ANY way to (get the trace) see the actual dynamic reordering > done for a given program? > > I want to give an input program and see the "out of order instruction > execution trace" of my program. > > I have access to an IBM-P7 machine and an Intel Core2Duo laptop. Also > please tell me if there is an easy alternative. http://www.cs.virginia.edu/kim/tortola/papers/weaver01performance.pdf http://www.eecs.umich.edu/~taustin/papers/ISPASS01-gpv.pdf An academic version of tools common throughout industry. E.g. an Intel "pipetrace visualization" differs from the AMD version mainly in the former having instructions go vertically, and time go horizontally, and the latter vice versa. http://www.cs.virginia.edu/~skadron/Papers/Anindo_thesis.pdf but few details. http://www.simplescalar.com/docs/simple_tutorial_v4.pdf
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Trace of CPU Instruction Reordering Ripunjay Tripathi <ripunjay.tripathi@gmail.com> - 2012-02-12 18:04 -0800 Re: Trace of CPU Instruction Reordering "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-12 18:28 -0800 Re: Trace of CPU Instruction Reordering "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-12 18:35 -0800
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