Path: csiph.com!feeder.erje.net!1.us.feeder.erje.net!newsfeed.fsmpi.rwth-aachen.de!newsfeed.straub-nv.de!news-2.dfn.de!news.dfn.de!storethat.news.telefonica.de!telefonica.de!news.panservice.it!bofh.it!news.nic.it!robomod From: Joerg Roedel Newsgroups: linux.kernel Subject: [PATCH 11/20] iommu/amd: Set up data structures for flush queue Date: Fri, 08 Jul 2016 13:50:02 +0200 Message-ID: References: X-Original-To: iommu@lists.linux-foundation.org Dkim-Signature: v=1; a=rsa-sha256; c=simple/simple; d=8bytes.org; s=mail-1; t=1467978325; bh=3QteCPOrNL+H7ZHNvslh6pUnIeUSsV5fclZ5a1I9tsg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZgkQA3F6EIAsQ0SthOV24+uyF0RzPQl32FvIPsuRRV7jsAQzCnYvFN0ZrSmBeUI6l SqqlgpBHBqryWHjS2uk2LTLDGdWCcghLJzqe0mn1Cr37EaKtKHu8Ky9QOpPMe84SKk ABpRo2jDT+pHuC3L2EfaoDdXzxkkMVNx04y0GzWLNrWtx9PsqRK5upI2fBCj5SPoKU Q58MWIdJFNoWR7YOWBniY7H8U/FcVsnnuZq1N4dMm4VRJiVdPcMMydOqBUqYG0duZn S0sttgpuXbtJT+9OFJYWunvwUyd2w48F+5gWm6Fhh0aTseznFPd7L7JBukCuo7kP00 6UW6/VF0yHzWw== X-Mailer: git-send-email 1.9.1 Sender: robomod@news.nic.it List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Approved: robomod@news.nic.it Lines: 92 Organization: linux.* mail to news gateway X-Original-Cc: linux-kernel@vger.kernel.org, Suravee Suthikulpanit , Vincent.Wan@amd.com, Joerg Roedel X-Original-Date: Fri, 8 Jul 2016 13:45:02 +0200 X-Original-Message-ID: <1467978311-28322-12-git-send-email-joro@8bytes.org> X-Original-References: <1467978311-28322-1-git-send-email-joro@8bytes.org> X-Original-Sender: linux-kernel-owner@vger.kernel.org Xref: csiph.com linux.kernel:1439348 From: Joerg Roedel The flush queue is the equivalent to defered-flushing in the Intel VT-d driver. This patch sets up the data structures needed for this. Signed-off-by: Joerg Roedel --- drivers/iommu/amd_iommu.c | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index b91843c..4e27c57 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -88,6 +88,22 @@ LIST_HEAD(ioapic_map); LIST_HEAD(hpet_map); LIST_HEAD(acpihid_map); +#define FLUSH_QUEUE_SIZE 256 + +struct flush_queue_entry { + unsigned long iova_pfn; + unsigned long pages; + struct dma_ops_domain *dma_dom; +}; + +struct flush_queue { + spinlock_t lock; + unsigned next; + struct flush_queue_entry *entries; +}; + +DEFINE_PER_CPU(struct flush_queue, flush_queue); + /* * Domain for untranslated devices - only allocated * if iommu=pt passed on kernel cmd line. @@ -2516,7 +2532,7 @@ static int init_reserved_iova_ranges(void) int __init amd_iommu_init_api(void) { - int ret, err = 0; + int ret, cpu, err = 0; ret = iova_cache_get(); if (ret) @@ -2526,6 +2542,18 @@ int __init amd_iommu_init_api(void) if (ret) return ret; + for_each_possible_cpu(cpu) { + struct flush_queue *queue = per_cpu_ptr(&flush_queue, cpu); + + queue->entries = kzalloc(FLUSH_QUEUE_SIZE * + sizeof(*queue->entries), + GFP_KERNEL); + if (!queue->entries) + goto out_put_iova; + + spin_lock_init(&queue->lock); + } + err = bus_set_iommu(&pci_bus_type, &amd_iommu_ops); if (err) return err; @@ -2535,6 +2563,15 @@ int __init amd_iommu_init_api(void) return err; #endif return 0; + +out_put_iova: + for_each_possible_cpu(cpu) { + struct flush_queue *queue = per_cpu_ptr(&flush_queue, cpu); + + kfree(queue->entries); + } + + return -ENOMEM; } int __init amd_iommu_init_dma_ops(void) @@ -2557,6 +2594,7 @@ int __init amd_iommu_init_dma_ops(void) pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n"); return 0; + } /***************************************************************************** -- 1.9.1