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From: "Rod Pemberton" <buzzoff@nonamewhichexists.cmm>
Newsgroups: comp.lang.forth
Subject: Re: http://www.lowrisc.org/ Open Core - is the Forth Community involved in this new 64Bit Core?
Date: Tue, 18 Nov 2014 16:16:48 -0500
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On Tue, 18 Nov 2014 05:56:39 -0500, Andrew Haley  
<andrew29@littlepinkcloud.invalid> wrote:
> visualforth@rocketmail.com wrote:
>> On Monday, November 17, 2014 5:26:05 AM UTC-5, JUERGEN wrote:

>>> Is anybody here involved in their project, to make them aware of  
>>> requirements to run Forth efficiently?
>>>
>> One argument is "Popular commercial ISAs are complex. The dominant
>> commercial ISAs (x86 and ARM) are both very complex to implement in
>> hardware to the level of supporting common software stacks and
>> operating systems. Worse, nearly all the complexity is due to bad,
>> or at least outdated, ISA design decisions rather than features that
>> truly improve efficiency."
>>
>> Seems to be they skipped the chapter of stack machines in McClusky's
>> "Design of Digital Computers".
>
> One of the architects is David Patterson -- who actually invented the
> term RISC -- so I think that idea that anyone "skipped the chapter" is
> ridiculous.
>

Did anyone here _actually_ read the linked to overview
of the RISC-V instruction set they're using?

"Optional variable-length instructions to both expand
available instruction encoding space and to support an
optional dense instruction encoding for improved
performance, static code size, and energy efficiency."

http://riscv.org/

So, that's VLIW and CISC *plus* RISC, all in one package.
I can't see how that's much different from modern x86, if any.
As an open design, the very first thing it's going to get is
an open, standardized set of CISC instructions ...  You can
pretty much guarantee that due to human nature.

Now, it seems, we have a RISC pioneer supporting both CISC
and VLIW.  Amazing!  I'd say he _clearly_ *missed* something.
Maybe, he missed having some CISC instructions during his
first time around with RISC.

LOL.

As people look for new solutions to old problems, they
inevitably recycle old solutions and call them new.
First, it was the MILL architecture, now it's lowRISC.
What's next?  A 1024-bit PDP-11?  A 1Thz 6502?  Z80E9?


Rod Pemberton