Path: csiph.com!usenet.pasdenom.info!aioe.org!.POSTED!not-for-mail From: "Rod Pemberton" Newsgroups: comp.lang.forth Subject: Re: Measuring execution speed -- profiling in Forth? Date: Mon, 17 Mar 2014 03:33:13 -0400 Organization: Aioe.org NNTP Server Lines: 35 Message-ID: References: NNTP-Posting-Host: CNsg4fVcCsvs3UaOgZtQCw.user.speranza.aioe.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit X-Complaints-To: abuse@aioe.org User-Agent: Opera Mail/12.16 (Linux) X-Notice: Filtered by postfilter v. 0.8.2 Xref: csiph.com comp.lang.forth:29055 On Sat, 15 Mar 2014 09:48:00 -0400, Assad wrote: > So a practical question: > > How to measure the execution speed of an algorithm in Forth? > A few people mentioned the RDTSC instruction for x86 processors. As mentioned in the past here, RDTSC is only for single-core processors, Pentium or later. RDTSC doesn't work correctly on multiple core processors. RDTSCP is for multiple core processors. You're also supposed to issue a serializing instruction prior to executing RDTSC or RDTSCP. One such instruction is CPUID which can be used to determine if the RDTSC and/or RDTSCP instructions are available. Even when using RDTSC and/or RDTSCP some processors: 1) fail to update the TSC (Time Stamp Counter) using the actual clock speed of the processor 2) suffer from TSC drifts 3) have TSCs which are affected by power management events x86 PCs have other timers you can use, depending on the generation of the PC and availability of access to the timers via the operating system, such as: DRAM refresh, RTC, PIT, LAPIC, ACPI PMT, and HPET. DRAM - Dynamic Random Access Memory refresh RTC - Real Time Clock PIT - Programmable Interval Timer LAPIC - Local Advanced Programmable Interrupt Controller ACPI PMT - Advanced Configuration and Power Interface Power Management Timer HPET - High Precision Event Timer Rod Pemberton