Path: csiph.com!eternal-september.org!feeder.eternal-september.org!nntp.eternal-september.org!.POSTED!not-for-mail From: Kragen Javier Sitaker Newsgroups: comp.lang.forth,comp.arch Subject: Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Date: Fri, 11 Sep 2026 13:48:30 -0300 Organization: Primarily biological and memetic Lines: 35 Message-ID: <878q57d99d.fsf@debian> References: <87qzk0nejz.fsf@nightsong.com> <116d89d$27baf$1@paganini.bofh.team> <2026Aug24.095510@mips.complang.tuwien.ac.at> <87a4q0afu7.fsf_-_@debian> <20260901143106.00006dd7@gmail.com> <1788314691-5857@newsgrouper.org> <20260902082315.000009c7@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Injection-Date: Fri, 11 Sep 2026 16:50:48 +0000 (UTC) Injection-Info: dont-email.me; logging-data="3236756"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+gmBPAg5ZOszvvP4SIVA2X"; posting-host="5e8b773666f2baa1b3e9fe7abeba1530" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux) Cancel-Lock: sha1:hLq1SINSbnUUCpf46Bc8nb2wzIM= sha1:FhKK62fEUW7Jt5N8IcydxIn94EQ= sha256:4wK8VKob2b70TML7cH2GpryT1XSRN3/Ilbwa9yM7PAE= sha1:G2WpNBPzm3QHkj2GcQF2QeeD3Io= sha256:NlqCDQy5Y9xgM3ByaPD6rdv3bDkv3W+Q4k/k8Jqsgac= Xref: csiph.com comp.lang.forth:135666 comp.arch:117955 John Ames writes: > On Wed, 02 Sep 2026 02:04:51 GMT > MitchAlsup wrote: >> For ADD, carry Rd contains only 1 bit, but for others, it contains >> “all the bits that did not make it into the standard result”. This >> makes CARRY suitable for all integer multiprecision arithmetic and >> for significant quantities of FP arithmetic. >> [...] >> Multi-precisions shifts use carry > > Yes, exactly - add/subtract set the designated overflow/carry register > to 1 on a carry/borrow (which can then be added/subtracted from the next > more significant word) but e.g. multiply can set it to the whole most- > significant half of the product, multi-place shifts can catch all the > bits that fall off one end in the other so that rotate becomes shift- > and-OR, etc. Very flexible, especially if you have the capability to > branch on the value of a GPR. A bit-shift operation with two source registers is sometimes called a “funnel shift”, which is sort of the inverse of this: That is, instead of one source register (for a given bit shift size) and two destination registers, a funnel shift has two source registers (plus the amount to shift) and possibly just one destination register. An interesting thing about funnel shifts is that, if both source registers are the same, it provides bit rotation, not just shift. Conceivably you could get the same result from this inverse funnel shift, depending on how you handle the case where the destination register is the same as the CARRY register. Kragen