X-Received: by 10.182.66.33 with SMTP id c1mr2050692obt.39.1402837577481; Sun, 15 Jun 2014 06:06:17 -0700 (PDT)
Path: csiph.com!v102.xanadu-bbs.net!xanadu-bbs.net!news.glorb.com!a13no2901357igq.0!news-out.google.com!a8ni5010qaq.1!nntp.google.com!border1.nntp.dca.giganews.com!nntp.giganews.com!news.iecc.com!.POSTED!nerds-end
From: idatarm@gmail.com
Newsgroups: comp.compilers
Subject: optimizing compilers for low power design
Date: Sun, 15 Jun 2014 05:20:04 -0700 (PDT)
Organization: Compilers Central
Lines: 14
Sender: news@iecc.com
Approved: comp.compilers@iecc.com
Message-ID: <14-06-003@comp.compilers>
NNTP-Posting-Host: news.iecc.com
Mime-Version: 1.0
X-Trace: miucha.iecc.com 1402837577 54527 2001:470:1f07:1126:0:676f:7373:6970 (15 Jun 2014 13:06:17 GMT)
X-Complaints-To: abuse@iecc.com
NNTP-Posting-Date: Sun, 15 Jun 2014 13:06:17 +0000 (UTC)
Keywords: optimize, architecture
Posted-Date: 15 Jun 2014 09:06:16 EDT
X-submission-address: compilers@iecc.com
X-moderator-address: compilers-request@iecc.com
X-FAQ-and-archives: http://compilers.iecc.com
Content-Type: text/plain; charset=ISO-8859-1
Xref: csiph.com comp.compilers:1258

  Abstract: We describe an algorithm for optimizing compilers for low
  power design. The algorithm can be applied to almost any c compiler
  and in particular we target gcc compiler. The algorithm works by
  modifying optimization table lookup of gcc.  This works in theory. We
  think such an algorithm will be able save at least 20% power. We
  compare with alternatives. We show it that idea is viable and
  theoretically prove that it will account for about 20% power savings.
  Another 40% of the power savings will come from branch prediction
  techniques based on profile guided optimization. Similarly, we
  optimize for size, which will produce 10% power savings. We believe
  our program will save power up to 75%

http://www.davesinvoice.com/papers/low%20power%20design%201.pdf