Path: csiph.com!v102.xanadu-bbs.net!xanadu-bbs.net!news.glorb.com!news-out.readnews.com!news-xxxfer.readnews.com!news.misty.com!news.iecc.com!.POSTED!nerds-end From: Hans-Peter Diettrich Newsgroups: comp.compilers Subject: Re: Green Compiler ? Date: Fri, 28 Dec 2012 08:35:52 +0100 Organization: Compilers Central Lines: 19 Sender: johnl@iecc.com Approved: comp.compilers@iecc.com Message-ID: <12-12-028@comp.compilers> References: <12-12-010@comp.compilers> <12-12-012@comp.compilers> <12-12-022@comp.compilers> NNTP-Posting-Host: news.iecc.com Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit X-Trace: leila.iecc.com 1356708247 40951 64.57.183.58 (28 Dec 2012 15:24:07 GMT) X-Complaints-To: abuse@iecc.com NNTP-Posting-Date: Fri, 28 Dec 2012 15:24:07 +0000 (UTC) Keywords: performance Posted-Date: 28 Dec 2012 10:24:07 EST X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Xref: csiph.com comp.compilers:812 Peter Dassow schrieb: > But I'm not sure this kind of optimization > would save a significant percentage compared to an clock cycle > optimized binary. I doubt that a clock cycle count is related to power consumption. On modern CPUs, with much parallel processing, parts of the chip may be inactive while others are operating. E.g. when two instructions execute in parallel, they will consume about the same amount of power as when executed sequentially. Please note that most CMOS processor power consumption results from switching (stray) capacities, and only a small percentage for leak currents. E.g. a register or gate consumes such power whenever a bit is changed, and almost nothing when it has reached an stable state. DoDi