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From: Patrick Scheible <kkt@zipcon.net>
Newsgroups: comp.arch,alt.folklore.computers
Subject: Re: Solving the Floating-Point Goldilocks Problem!
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Date: Mon, 05 Sep 2011 22:48:55 -0700
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Peter Flass <Peter_Flass@Yahoo.com> writes:

> On 9/3/2011 10:57 AM, jmfbahciv wrote:
>> <snort>   I don't consider our byte instructions CISCy.  My opinion,
>> which has to be taken as an uneducated opinion in c.a, is that
>> the PDP-10 had the RISC philosophy underneath.
>
> I'd not say they were CISCy.  As I recall there was ILDB and IDPB for
> byte loads and stores that were register-storage; no storage to
> storage stuff.  The comp.arch people know a lot more about the details
> than I do, but a barrel-shifter and a few gates for masking would be
> all you'd need.

Yeah, but the PDP-10 also featured arbitrary levels of indirection on
memory accesses.  It made possible a lot of interesting data structures,
but also made it very difficult to tell which pieces of memory any given
instruction were going to access in advance.

-- Patrick