Path: csiph.com!newsfeed.hal-mli.net!feeder3.hal-mli.net!newsfeed.hal-mli.net!feeder1.hal-mli.net!border3.nntp.dca.giganews.com!Xl.tags.giganews.com!border1.nntp.dca.giganews.com!nntp.giganews.com!local2.nntp.dca.giganews.com!news.giganews.com.POSTED!not-for-mail NNTP-Posting-Date: Thu, 12 Apr 2012 23:33:21 -0500 Message-ID: <4F87AC8E.80802@SPAM.comp-arch.net> Date: Thu, 12 Apr 2012 21:33:18 -0700 From: "Andy (Super) Glew" Reply-To: andy@SPAM.comp-arch.net Organization: comp-arch.net User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:11.0) Gecko/20120327 Thunderbird/11.0.1 MIME-Version: 1.0 Newsgroups: comp.arch Subject: Re: Indirect Bit References: <4F84FB1E.6CD1FC88@sonic.net> <72e7ba91-76b9-49ec-b5fc-1313976aae34@v17g2000pbt.googlegroups.com> <4F87799B.F019D9DB@sonic.net> <34f253f7-9ded-4356-b746-6ae423b3fdb4@h10g2000pbi.googlegroups.com> In-Reply-To: <34f253f7-9ded-4356-b746-6ae423b3fdb4@h10g2000pbi.googlegroups.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Lines: 57 X-Usenet-Provider: http://www.giganews.com X-Trace: sv3-SVQPJ1ixt4lwJ+nLQpn8AtWfO5O+FbvV5VQH0RPgKj5m96p+InjQ3l52/t/UKaBNVZjTHB1oUd4PAVi!sPHoNBm6Q7/80ni9T1VgERGk+Zux4Zo8canuSVgDxyv1RNEZP+NXeq0uiQ== X-Complaints-To: abuse@giganews.com X-DMCA-Notifications: http://www.giganews.com/info/dmca.html X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.40 X-Original-Bytes: 4041 Xref: csiph.com comp.arch:6517 On 4/12/2012 5:25 PM, Quadibloc wrote: > On Apr 12, 6:55 pm, Mark Thorson wrote: > >> Assume you have to write and read >> each location at least once. That >> provides an upper bound on how much >> memory a von Neumann machine can use. > > You haven't seen the quad-core machines turning up at your local > computer store yet? > > That machines will continue to be von Neuman uniprocessor computers, > rather than some sort of massively parallel architecture... is not a > physical constraint, and, in fact, appears to be contra-indicated by > current trends. > > So the fact that a machine with 2^80 bytes of RAM might also have 2^40 > processors (or just 2^30 processors) in it... is not necessarily a > fatal obstacle to the existence of such a machine. > > John Savard OK, what exactly does "Von Neuman architecture" mean to you? Not just you, John, but other comp.arch participants. Uniprocessor - okay, I give, not interesting going forward. However, I think of a quad core, or even a 2^40 processor system, as being a parallel Von Neuman machine. Wikipedia says "First Draft of a Report on the EDVAC ... a design architecture for an electronic digital computer with subdivisions of a processing unit consisting of an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms." Many parallel machines are going to look like this, at each node. A neural net is non-Von, because it doesn't have the pieces: no PC, no separate program, the program is the interconnection network. Thinking of the "von Neuman bottleneck" as a shared instruction and data bus that cannort fetch and instruction and do data memory at the same time is not interesting. We have had Harvard cache architectures on von Neuman machines for years. Programs *are* data, but not all the time: the data phase and the instruction phase tend to be fairly separate. My take is that the sequencer, the PC, is the basic von Neuman bottleneck. Somebody has to write a program that gets sequenced. Dataflow is between VN and neural nets, because the sequencing is not so explicit as in VN, but not as implicit or structured as in neural nets. Perhaps most interesting is the possiblilty of non-von Neuman programming styles running on, whatever, possibly highly parallel von Neuman multiprocessors. Programming, sequencing, is the true von Neuman bottleneck. Logic programming is non-VN.