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Date: Wed, 06 Jul 2011 23:39:12 -0700
From: "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net>
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Subject: Re: The Indexed Instruction Problem Solved!
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On 7/6/2011 11:38 PM, Andy "Krazy" Glew wrote:
> By the way, I am also collecting addressing modes for a different article.
>
> The standard ones.
>
> But especially the less standard address modes, such as
>
> * Double Indirect M[ M[reg+offset] +offset ]
> which I suggested long ago back in the days of AI architectures,
> as an optimization for "handles"
>
> along with a doubly indirect cache,
> to eliminate the pointer dereferencing.
>
>
> What other blasts from the past? VAX and M68K and NS32K...




I'm also collecting instructions - although I have a list started that I 
have been meaning to post.

Realized just now that I had forgotten LEA.