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Date: Sat, 11 Jun 2011 09:31:01 -0700
From: "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net>
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Subject: Re: Beyond binary compatibility
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On 6/7/2011 3:02 PM, Paul A. Clayton wrote:
> On Jun 7, 11:22 am, MitchAlsup<MitchAl...@aol.com>  wrote:
>> On Jun 7, 2:05 am, "Paul A. Clayton"<paaronclay...@gmail.com>  wrote:
>>
>>> With respect to microcode, how much of the microcode is
>>> merely instruction ROM and how much uses specialized state
>>> machines (in the front-end)?
>>
>> Back in the early days of Opteron with 3K microcode 'words' about 1/2
>> was used for power on initialization and power on checks and never
>> used again. The Virtual machine Opterons have 4K microcode words and
>> about 1/3 of it ends up "used once".
>
> So there are no front-end state machines for generating
> microcode?  (It seemed like something like FXSAVE might use
> a state machine to iterate through the register names.)

No. There are no front end state machines.  Possibly just a microcode 
loop counter, but  that is supporting generic microcode.

I advocate state machine support for REP MOVS, etc., but that requires 
information from execution - the loop count - so it is not purely a 
front end state machine.