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From: Kragen Javier Sitaker <kragen@canonical.org>
Newsgroups: alt.folklore.computers,sci.electronics.design,comp.arch
Subject: segments and architectural experimentation (was Re: segments, was Self-hosting and the 6502)
Date: Fri, 11 Sep 2026 08:13:05 -0300
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scott@slp53.sl.home (Scott Lurndal) writes:
> When I started at Burroughs, they had just started a project
> to increase amount of memory that could be accessed by
> an application on the medium systems (B3500) line.    The
> B3500 had a flat one million digit address space and
> could run in ‘control state’ or ‘normal state’.  When the
> base register had the value zero, the processor ran in
> control state and privileged instructions were available,
> otherwise the processor was is normal state and the
> 1md address space started at the privileged base register and
> ended at the privileged limit register.

That’s an interesting approach!  I had no idea how the Medium Systems
line worked.

You’d think you’d see a lot of experimentation around things like this
nowadays that you can get your own open-source chip design fabbed
through Tiny Tapeout for US$300, including in IHP’s 350GHz 130nm SiGe
BiCMOS process.  (Not 350MHz; fT is 350GHz.)

Without Tiny Tapeout, IHP’s MPW price for that “SG13G2” process is
€7300/mm² with a minimum of 0.8mm², which I find a rather daunting
pricetag for something that probably won’t work the first time.  As I
understand it, that kind of thing is what sunk Chuck Moore’s chip design
efforts at iTV in the 90s: they didn’t have enough capital to iterate
fast enough with MPW runs through MOSIS to ever ship a working chip.

New approaches to protection seem like an especially promising area as
we smash headfirst into the “vulnpocalypse” and AI generates exploits
for the swiss-cheese computer systems the whole internet is built on.

Kragen