Path: csiph.com!eternal-september.org!feeder.eternal-september.org!mx02.eternal-september.org!.POSTED!not-for-mail From: Anne & Lynn Wheeler Newsgroups: alt.folklore.computers Subject: Re: PL/I advertising Date: Wed, 08 Jun 2016 11:13:01 -0700 Organization: Wheeler&Wheeler Lines: 39 Message-ID: <87inxjim6q.fsf@garlic.com> References: <873a27e2-6baf-4772-9dc8-45a8f1bc466e@googlegroups.com> <873a27e2-6baf-4772-9dc8-45a8f1bc466e@googlegroups.com> <87a8j4cv9j.fsf@garlic.com> <5752402d.1491865@nntp2.rawbw.com> <5753d4d6.26125416@nntp2.rawbw.com> <878tyjeen1.fsf@garlic.com> <87mvmyi9r9.fsf@garlic.com> <874m95uh16.fsf@garlic.com> <87porrinzn.fsf@garlic.com> Mime-Version: 1.0 Content-Type: text/plain Injection-Info: mx02.eternal-september.org; posting-host="6a701f7a2f120c3c3ec794af16136f6c"; logging-data="4081"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+z3UBuqP6ewhFi/1vhyG1Nd+q++8EXUTc=" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) Cancel-Lock: sha1:kKnWUqxmJnU+S6Ye/l3UsKlUVQA= sha1:wNXSyJ7Jih9hNu+SKveoge+F4Uo= Xref: csiph.com alt.folklore.computers:164824 Anne & Lynn Wheeler writes: > I did microcode queued interface for disk controller ... allowing disk > controller to do real-time reorder for execution ... and real-time > redrive queued requests (some superset what would be defined later for > 370/xa SSCH). I also did something similar with queued task microcode > interface for CPU execution (this was 1975) ... something like would be > seen later for i432 ... aka number of processors was transparent to the > low level operating system software (effectively processor software went > to finish/wait, and microcode would pull off any pending work and > dispatch it) ... however higher level scheduling was aware of processor > cycles in the configuration for dynamic resource management (would have > to power off the machine to add/remove microprocessors). re: http://manana.garlic.com/~lynn/2016d.html#59 PL/I advertising http://manana.garlic.com/~lynn/2016d.html#62 PL/I advertising as in ECPS, lots of kernel 370 code (in ECPS case 70% of pathlength) on nearly 1:1 basis for 10:1 speedup. However, got more stuff into the 5-way ... but also higher-level function ... like queued interfaces ... not only faster operatoin, but also improved the throughput of the operation (since eliminated a lot of the synchronized interrupt delays to redrive disk i/o or CPU tasks.) later, the i432 guys gave a presentation at Asilomar SIGOPS meeting where they said that putting high level, advanced function (like multiprocessor dispatching) into the machine was big problem. For them everything went directly into silicon (not microcode) ... any fixes/enhancements required replacement with new silicon chip ... not simple matter of updating silicon some past 5-way SMP posts http://manana.garlic.com/~lynn/submain.html#bounce and SMP and/or compare-and-swap posts http://manana.garlic.com/~lynn/subtopic.html#smp -- virtualization experience starting Jan1968, online at home since Mar1970