Path: csiph.com!feeder.erje.net!2.us.feeder.erje.net!weretis.net!feeder6.news.weretis.net!feeder.usenetexpress.com!feeder-in1.iad1.usenetexpress.com!border1.nntp.dca1.giganews.com!nntp.giganews.com!buffer1.nntp.dca1.giganews.com!buffer2.nntp.dca1.giganews.com!news.giganews.com.POSTED!not-for-mail NNTP-Posting-Date: Wed, 06 Sep 2017 12:02:10 -0500 From: Scott Hemphill Newsgroups: comp.sys.apple2 Subject: Re: WDC 65C832 design in today's world References: <82a80537-376f-47d8-84d6-e732ebf8d0b1@googlegroups.com> <60e3c8f4-9e24-4556-8251-52b77cf0e670@googlegroups.com> <83062778-d450-4ed5-994c-0c27f30a0cc3@googlegroups.com> <06bbe682-bb72-43a0-a83b-72f23e5c126f@googlegroups.com> Reply-To: hemphill@alumni.caltech.edu Date: Wed, 06 Sep 2017 13:02:10 -0400 Message-ID: <87r2vjpxpp.fsf@hemphills.net> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) Cancel-Lock: sha1:R5sW8fuz6tb4s50rAstB+t83CkQ= MIME-Version: 1.0 Content-Type: text/plain Lines: 35 X-Usenet-Provider: http://www.giganews.com X-Trace: sv3-omX5SAZTwh5cGpiFr99QpsdKhMfA/KNj4j6bIX7OjFk+Yt/S78YyxW+tTFjROiG6SpgqiQQBHct4Y80!ZiLhNyY/lrkvBIz/N3J7q/Of8x5l0TKlwD4co1nVhWbYpCqAFj1Z5PI= X-Complaints-To: abuse@giganews.com X-DMCA-Notifications: http://www.giganews.com/info/dmca.html X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.40 X-Original-Bytes: 2966 Xref: csiph.com comp.sys.apple2:33476 barrym95838 writes: > On Friday, September 1, 2017 at 3:28:00 PM UTC-7, Antoine Vignau wrote: >> Why? Because they are missing in the 65816 >> av > > There's no more op-code space, so you would have to start using $42 > as a prefix byte to maintain any claim of backward compatibility. An idea I had was to have a shadow memory for storing the upper two bytes of 32-bit addresses. As long as the shadow memory is all zero, then 8-bit code will function normally. But every instruction which uses a two-byte address would also fetch two more bytes from the shadow memory, constructing a four-byte address. JSR would push the upper two bytes of the return address to the shadow stack, and RTS would fetch them. You could have a status bit which you turn on/off to switch between 8-bit and 32-bit access, so that you can use regular 8-bit code in ROMs. You would need to be able to manipulate the shadow memory when you load 32-bit code. One way would be to have a mode where memory reads come from the first 64k of regular memory, but writes go to the first 64k of shadow memory. After you set up the first 64k of shadow memory (or as much of it as you need) you can turn on 32-bit mode and JMP to it (or RET, or simply fall through to inline code) to bootstrap program loading. The nice thing about this scheme is the lack of bank registers and full access to the 32-bit address space. But you don't get any 16-bit registers or any additional functionality. Scott -- Scott Hemphill hemphill@alumni.caltech.edu "This isn't flying. This is falling, with style." -- Buzz Lightyear