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Groups > comp.os.linux.development.system > #756
| Newsgroups | comp.os.linux.development.system |
|---|---|
| Date | 2016-05-17 12:23 -0700 |
| Message-ID | <da8f8c10-9a66-4534-bf0e-0c30f076ec74@googlegroups.com> (permalink) |
| Subject | mechanism behind io reads from eeprom (Linux device driver) |
| From | m <videmos0@gmail.com> |
Hello, I was looking at this code: http://lxr.free-electrons.com/source/drivers/net/wireless/ath/ath9k/pci.c#L777 It looks like this code triggers a read from io memory (first ops->read), waits until value at another io memory location is set to expected code (hw_wait), then it reads final value from yet another io memory location (second ops->read). Is there a document or a web page that would explain how low level io access like that works? Or if someone can explain, that would be great too. Thanks a lot, M
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mechanism behind io reads from eeprom (Linux device driver) m <videmos0@gmail.com> - 2016-05-17 12:23 -0700
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