Path: csiph.com!weretis.net!feeder6.news.weretis.net!panix!.POSTED.panix5.panix.com!not-for-mail From: jeffj@panix.com (Jeff Jonas) Newsgroups: comp.os.cpm Subject: Re: The ideal standalone Z80-based retro computer Date: Thu, 7 Sep 2023 03:50:45 -0000 (UTC) Organization: ferretronix.com Message-ID: References: <0b23887c-d521-4424-8e62-8758cb92c763n@googlegroups.com> <72829363-c906-4557-ac1c-50a925bc1639n@googlegroups.com> <4e68d3b3-9151-4b23-afbf-478dba485006n@googlegroups.com Injection-Date: Thu, 7 Sep 2023 03:50:45 -0000 (UTC) Injection-Info: reader2.panix.com; posting-host="panix5.panix.com:166.84.1.5"; logging-data="3926"; mail-complaints-to="abuse@panix.com" Summary: Z80 had many hardware wins! Xref: csiph.com comp.os.cpm:13996 > Let's not forget the Z80 itself was a new processor > built upon an old design and became popular for that reason. Yes, no, kinda, maybe? 8080 compatibility definitely helped on the software side, running CP/M and such. But the Z80's hardware was tremendously easier to use, almost like silicon-chip Lego, thus becoming the favorite for embedded systems such as "smart modems", SCSI controllers, terminal servers. In a way, the Z80 peripherals were "the tail wagging the dog" because they were so popular, particularly the SIO dual-channel serial I/O chips. Z80 hardware features: +5 volts only, no +/- 12v single phase clock: no special clock generator required Z80 native peripheral chips self-arbitrated DMA and vectored interrupts via daisy-chain. No interrupt controller required. built in dram refresh cycle, making RAM interfacing easier. The Z80 signals were so direct and easy to use that they formed the basis of the STD bus (which was later extended). I/O address space was separate from the 64k memory address space due to IN, OUT instructions asserting the /IORQ signal instead of /MREQ and other things :-) --