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the RISC startup that would democratize silicon

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Saw this posted over at alt.folklore.computers, and it is too interesting to
resist posting here too.  Not sure if the RISC platform will compete with
ARM or Intel on speed alone, but the fact that these guys want a fully open
system is appealling to me.  Now more than ever, in fact.

https://www.hpcwire.com/2016/07/13/risc-v-startup-aims-democratize-silicon/?eid=328380336&bid=1465430

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RISC-V Startup Aims to Democratize Custom Silicon
Tiffany Trader
SiFive logo from slide

Momentum for open source hardware made a significant advance this week with
the launch of startup SiFive and its open source chip platforms based on the
RISC-V instruction set architecture.  The founders of the fabless
semiconductor company — Krste Asanovic, Andrew Waterman, and Yunsup Lee —
invented the free and open RISC-V ISA at the University of California,
Berkeley, six years ago.

The progression of RISC-V and the launch of SiFive opens the door to a new
way of chip building that skirts prohibitive licensing costs and lowers the
barrier to entry for custom chip design.  The traction around RISC-V and
other open source hardware efforts like the Facebook-initiated Open Compute
Project, and to some extent even the growing diversity in the processor
space, which reflects a demand for more openness and choice, may indicate
the beginnings of a revolution similar to the one started by Linux on the
software side.

Jack Kang, vice president of product and business development, addressed the
significance of an open instruction set architecture and this trend toward
open hardware.

“The economic demise of Moore’s law can no longer be disputed,” he shared. 
“The cost per transistor is no longer decreasing.  The fixed cost to start a
new design continues to rise.  Due to these factors, we have seen incredible
change in the semiconductor industry.  The industry has been set up for the
past 30, 40 years based on Moore’s law.  How they engineer chips, what
products they build, how they work with customers, all of that is based on
30+ years of legacy.  Last year, we saw over $100B in mergers & acquisition
activity in the semiconductor space, due to these factors and the
requirement to look for larger and larger customer volume sockets.”

Designing a custom chip can cost tens and even hundreds of millions of
[Adollars, said SiFive Co-founder Yunsup Lee in an official statement.  “It is
simply impossible for smaller system designers to get a modern,
high-performance chip, much less one customized to their unique
requirements.”

SiFive sees custom silicon as an opportunity for the markets that are not
being adequately served by the traditional semiconductors.  The founders
want to democratize access to custom silicon beyond the big players to the
inventors, makers, startups, and smallest companies.  Included here are
fragmented or new markets that do not have the volume or revenue required
under the conventional proprietary semiconductor approach, Kang said.

Target markets for SiFive span machine learning, storage and networking as
well as the fast-growing IoT market with the launch of two platforms: SiFive
Freedom U500 graphic

The Freedom U500 Series — part of the Freedom Unleashed family — includes a
Linux-capable embedded application processor with multicore RISC-V CPUs,
running at a speed of 1.6 GHz or higher with support for accelerators and
cache coherency.  This SoC was manufactured by TSMC on 28nm process and
targets the machine learning, storage and networking space.  The U500
supports PCIe 3.0, USB 3.0, Gigabit Ethernet, and DDR3/DDR4.

The Freedom E300 Series, the first product in the Freedom Everywhere family,
is aimed at the embedded microcontroller, IoT and wearables markets.  The
180nm TSMC chip implements small and efficient RISC-V cores with RISC-V
compressed instructions, shown to reduce code size by up to 30 percent,
according to the company.

In-depth guides for both platforms are available here.

Kang said that he and his colleagues have been witnessing the benefits of
the growth of the RISC-V ecosystem.  To this point, RISC-V Foundation has
more than doubled membership since January.  At the last RISC-V workshop in
January, there were only 16 member companies, reports Kang, and that roster
now includes 40 member companies, including heavyweights Google, Microsoft,
IBM, NVIDIA, HP Enterprise, AMD, Qualcomm, Western Digital and Oracle.

SiFive timed its launch to coincide with the 4th RISC-V workshop, happening
this week in Boston, where the founders demoed both platforms.

While SiFive is focusing on the embedded and industrial space, the
opportunity exists to use RISC-V for other purposes, including server-class
silicon.  The ISA’s designers sought to ensure that it would support
implementation in an ASIC, FPGA or full-custom architecture.  Earlier this
year at the Stanford HPC Conference, MIT’s Kurt Keville said that RISC-V
addresses several of the exascale challenges that were included in the DOE’s
oft-cited Exascale report.  RISC-V also works well as a teaching tool in
academia, said Keville, having a fraction of the instructions of x86 (177
versus roughly 3,000) and about fifth that of ARMv8 (with about 1,000
instructions).

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the RISC startup that would democratize silicon RS Wood <rsw@therandymon.com> - 2016-07-19 03:00 +0000

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