Path: csiph.com!x330-a1.tempe.blueboxinc.net!usenet.pasdenom.info!news.albasani.net!eternal-september.org!feeder.eternal-september.org!.POSTED!not-for-mail From: Joshua Cranmer Newsgroups: comp.lang.java.programmer Subject: Re: higher precision doubles Date: Tue, 09 Aug 2011 22:06:00 -0500 Organization: A noiseless patient Spider Lines: 44 Message-ID: References: <4e41ef89$0$306$14726298@news.sunsite.dk> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Date: Wed, 10 Aug 2011 03:06:06 +0000 (UTC) Injection-Info: mx04.eternal-september.org; posting-host="B3q1fNdvNsCxx/IZ4idKGA"; logging-data="23936"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+ha2MnWPzsj3T6oU6StD1gAZ/vanSVPbM=" User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:5.0) Gecko/20110624 Thunderbird/5.0 In-Reply-To: <4e41ef89$0$306$14726298@news.sunsite.dk> Cancel-Lock: sha1:WTDAH+mZfb3BPIFb1yU/rDXjEKo= Xref: x330-a1.tempe.blueboxinc.net comp.lang.java.programmer:6948 On 8/9/2011 9:40 PM, Arne Vajhøj wrote: > On 8/9/2011 11:11 AM, Joshua Cranmer wrote: >> On 8/8/2011 11:42 PM, >> supercalifragilisticexpialadiamaticonormalizeringelimatisticantations >> wrote: >>> How does that interact with JIT, though? On x86, the simplest way for >>> JIT to make non-strictfp code use the FPU would be to just load the >>> initial values into the (80-bit-wide!) registers and perform FADDs, >>> FMULs, etc. on them. As long as the computation stayed in registers the >>> higher precision then ought to remain in effect -- for JITted code. >>> Adding extra code to mask off 16 of the register bits (or the mantissa >>> subset of the extra bits) after every FP op would slow things down. Is >>> the JLS interpreted to require the JIT do this (for non-strictfp code)? >>> And, if not, what does the HotSpot JIT do in actuality? >> >> All modern x86 processors sport the SSE-style instructions, which can do >> 32-bit and 64-bit instructions (also in a SIMD format) without touching >> the FPU, and I suspect that these are slightly faster than using the x87 >> FPU instructions. I wouldn't be surprised if the JIT emitted SSE in the >> vast majority of cases, so that JIT'd non-strictfp code would end up >> returning the same results as JIT'd strictfp code. > > Is that possible in 32 bit mode? > > Practically all CPU's today are 64 bit capable, but many still run > 32 bit desktop OS'es. I don't recall x86's mode-switching semantics off the top of my head, but I do believe that it is possible to run 64-bit instructions in 32-bit mode. The problem is the C ABI, particularly register saves and restores, don't handle 64-bit stuff properly when compiled with 32-bit targets for compilers. SSE2 dates back to something like the Pentium II, so it's not a 64-bit mode thing. Although I think SSE2 itself may only be limited to single precision floats. Poking around the hotspot source code for Java 7 does indicate that sse2 support is in the JIT, although I don't know the entire set of circumstances that triggers it. -- Beware of bugs in the above code; I have only proved it correct, not tried it. -- Donald E. Knuth