Path: csiph.com!newsfeed.hal-mli.net!feeder3.hal-mli.net!newsfeed.hal-mli.net!feeder1.hal-mli.net!news.glorb.com!news-out.octanews.net!indigo.octanews.net!auth.beige.octanews.com.POSTED!not-for-mail From: Paul Rubin Newsgroups: comp.lang.forth Subject: Re: GA144 article References: <12aeb4bb-d890-4054-be00-c8c2b25b80dd@k5g2000vbf.googlegroups.com> <20bfe8cc-640d-4c88-8fa7-1ae05de11762@googlegroups.com> <7xhasxwjqj.fsf@ruckus.brouhaha.com> <7x394es208.fsf@ruckus.brouhaha.com> <7xzk6kki1a.fsf@ruckus.brouhaha.com> <7xtxwr5cjp.fsf@ruckus.brouhaha.com> <0c5e8f67-c185-4e41-b8b4-21b29d6feaef@googlegroups.com> <7xa9yg1re5.fsf@ruckus.brouhaha.com> <420f3e55-76d1-43eb-85b7-182c02f3fd22@googlegroups.com> Date: Tue, 31 Jul 2012 11:48:38 -0700 Message-ID: <7x1ujrydfd.fsf@ruckus.brouhaha.com> Organization: Nightsong/Fort GNOX User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.1 (gnu/linux) Cancel-Lock: sha1:tiCh2AkG4yyGAp7UANDmOfRvwYI= MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Lines: 40 NNTP-Posting-Date: 31 Jul 2012 13:48:45 CDT X-Complaints-To: abuse@octanews.net Xref: csiph.com comp.lang.forth:14593 rickman writes: >> My idea was simply to add diagonal connections > If you are going to improve the internode comms I would suggest > a cube arrangement. That would be more traditional and probably better for the user, but it would mean having to run traces across long distances on the chip, which I figure is a bigger redesign, as well as being a philosophical shift away from a 2-D grid computer. >> http://www.greenarraychips.com/home/documents/greg/DB001-110412-F18A.pdf >> pages 9 and 12. > The F18A databook page 9, "5.1 nanoseconds when reading or writing > internal memory". These ops are not to or from "internal memory". Page 12 section 3.3 paragraph 2: When a node operates on a port the data transfer occurs at approximately memory speed unless the other node connected to the port is not yet performing the complementary operation; in this case the operating node suspends... That's why I figured 5.1 ms for the port transfers, similar to memory. I also have to wonder how straightforward it is to get the adjacent node exactly in sync so that the port never blocks. Don't forget you may need bidirectional wires for some uses, i.e. yet more delays. > The cycle time does not need to be any faster than a node can generate > or process data so there is no real issue there. At 15 ns cycle time (about 66 mhz) for the transfers, it's possible that a simple processing loop on a 700 mhz node can outrun it. > the GA144 data sheet says the ROM > code is for "an external SDRAM using 18-bit data." I can't find any > 18 bit SDRAM chips these days. I remember a page that I think was on Chuck's site, about the ram setup on the Haypress Creek board. But I've just spent a while unsuccessfully looking for it.