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NNTP-Posting-Date: Sat, 02 Apr 2011 16:12:41 -0500
From: Chris Hinsley <chris.hinsley@gmail.com>
Newsgroups: comp.lang.forth
Date: Sat, 2 Apr 2011 22:12:41 +0100
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Subject: Re: Verilog macro issue
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Xref: x330-a1.tempe.blueboxinc.net comp.lang.forth:965

On 2011-04-02 21:36:23 +0100, Chris Hinsley said:

> This works as a macro to define priority encoders, but still not the 
> same as the original encoder done with a case.
> 
> `define PRI_ENCODER(NAME, BITS)		\
> module NAME(i, o);							\
> 	input [((2 ** BITS) - 1):0] i;				\
> 	output [(BITS - 1):0] o;					\
> 	reg [(BITS - 1):0] o;						\
> 	integer n;									\
> 	always @(i)								\
> 	begin : THE_LOOP						\
> 		o = BITS'b0;							\
> 		for (n = 0; n < (2 ** BITS); n = n + 1) \
> 		begin									\
> 			if (i[n])								\
> 			begin								\
> 				o = n;							\
> 				disable THE_LOOP;			\
> 			end								\
> 		end									\
> 	end										\
> endmodule
> 
> `PRI_ENCODER(pri_enc3, 3)
> `PRI_ENCODER(pri_enc4, 4)
> `PRI_ENCODER(pri_enc5, 5)

I've ended up with this, which does the correct job, but I really think 
the code sucks. There has to be a better way to do it than this ! God 
knows what the FPGA compiler will produce for this. :(

`define ENCODER(NAME, BITS)			\
module NAME(i, o);							\
	input [((2 ** BITS) - 1):0] i;				\
	output [(BITS - 1):0] o;					\
	reg [(BITS - 1):0] o;						\
	integer n, f;								\
	always @(i)								\
	begin : THE_LOOP						\
		o = BITS'b0;							\
		f = 0;									\
		for (n = 0; n < (2 ** BITS); n = n + 1) \
		begin									\
			if (i[n])								\
			begin								\
				if (f) disable THE_LOOP;	\
				f = 1;							\
			end								\
		end									\
		for (n = 0; n < (2 ** BITS); n = n + 1) \
		begin									\
			if (i[n])								\
			begin								\
				o = n;							\
				disable THE_LOOP;			\
			end								\
		end									\
	end										\
endmodule

`ENCODER(enc1, 1)
`ENCODER(enc2, 2)
`ENCODER(enc3, 3)
`ENCODER(enc4, 4)
`ENCODER(enc5, 5)