Path: csiph.com!weretis.net!feeder6.news.weretis.net!news.misty.com!news.iecc.com!.POSTED.news.iecc.com!nerds-end From: Kaz Kylheku <864-117-4973@kylheku.com> Newsgroups: comp.compilers Subject: Re: Good explanation of Recursive Ascent Parsing wanted Date: Fri, 7 Oct 2022 18:57:01 -0000 (UTC) Organization: A noiseless patient Spider Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <22-10-023@comp.compilers> References: <22-09-018@comp.compilers> <22-09-024@comp.compilers> <22-10-021@comp.compilers> Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="26573"; mail-complaints-to="abuse@iecc.com" Keywords: architecture Posted-Date: 08 Oct 2022 20:11:43 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Xref: csiph.com comp.compilers:3194 On 2022-10-06, antispam@math.uni.wroc.pl wrote: > Of couse, modern machines tend to have larger caches than the > old ones. But also modern machines are throughput oriented > and my suffer more from latency. But that's the latency of a single instruction you're talking about, right?. E.g. a deeper pipeline can worsen the time from instruction fetch to completion, if the clock isn't jacked up and propagation delays reduced to compensate. When do you care about single-instruction-level latency, other than if concerned about pipeline stalls in some scenarios? Throughput translates to low latency at the level of blocks of instructions or procedures. The procedure call returns a result faster due to throughput, which is less latency. The latency you perceive on modern machines as an interactive user is due to cra^H^H^Hrichly functional software stacks.