Path: csiph.com!weretis.net!feeder6.news.weretis.net!news.misty.com!news.iecc.com!.POSTED.news.iecc.com!nerds-end From: Philipp Klaus Krause Newsgroups: comp.compilers Subject: Re: Modern compilers for ye olde architectures Date: Wed, 6 Oct 2021 18:20:34 +0200 Organization: Compilers Central Lines: 17 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <21-10-015@comp.compilers> References: <21-10-007@comp.compilers> <21-10-012@comp.compilers> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="60402"; mail-complaints-to="abuse@iecc.com" Keywords: architecture, code Posted-Date: 06 Oct 2021 12:42:45 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Content-Language: en-US Xref: csiph.com comp.compilers:2723 Am 06.10.21 um 09:56 schrieb Anton Ertl: > So eventually computer architects introduced machines with > general-purpose registers like the PDP-11, the VAX, and the RISCs; and > compiler writers developed techniques like graph colouring to make > good use of these architectures. > > Maybe with the increased memory and processing power available now, > one could do better, but given that special-purpose registers are > mostly a thing of the past, there has not been much research into > that, that I am aware of. See "Optimal Register Allocation in Polynomial Time". A graph-coloring approach that can handle irregularities well (as long as there are not too many registers). SDCC uses such a register allocator for some backends, including z80. Philipp