Path: csiph.com!xmission!news.snarked.org!border2.nntp.dca1.giganews.com!nntp.giganews.com!news.iecc.com!.POSTED.news.iecc.com!nerds-end From: gah4 Newsgroups: comp.compilers Subject: Re: 8086 register allocation Date: Mon, 10 May 2021 21:19:27 -0700 (PDT) Organization: Compilers Central Lines: 15 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <21-05-009@comp.compilers> References: <21-05-005@comp.compilers> <21-05-007@comp.compilers> <21-05-008@comp.compilers> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="7709"; mail-complaints-to="abuse@iecc.com" Keywords: architecture, history Posted-Date: 12 May 2021 23:55:52 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com In-Reply-To: <21-05-008@comp.compilers> Xref: csiph.com comp.compilers:2661 (Snip on x87 register allocation) > [Normal stack machines have the top few entries in registers and do the > spilling to memory in hardware. The x87 stack has 8 registers, which is > a lot for a stack machine, but the spilling was broken. You can address > into the stack but you can't really use it as a register machine. -John] It was some years ago, but I read the story about the gcc code generator, which is designed for register machines. So, they don't quite treat it as a register machine, but not a stack machine, either. At any point in the code, there should be a known (constant) number of items on the stack, so you can address the registers using that number. I think that is what Intel expected, when they wrote that you can use it as a register machine. It would be less fun in assembly, though.