Path: csiph.com!xmission!usenet.csail.mit.edu!news.iecc.com!.POSTED.news.iecc.com!nerds-end From: Hans-Peter Diettrich Newsgroups: comp.compilers Subject: Re: 8086 register allocation Date: Tue, 11 May 2021 03:35:11 +0200 Organization: Compilers Central Lines: 20 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <21-05-008@comp.compilers> References: <21-05-005@comp.compilers> <21-05-007@comp.compilers> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="73561"; mail-complaints-to="abuse@iecc.com" Keywords: arithmetic, architecture, comment Posted-Date: 10 May 2021 22:42:28 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com In-Reply-To: <21-05-007@comp.compilers> Content-Language: de-DE Xref: csiph.com comp.compilers:2660 On 5/10/21 11:49 PM, gah4 wrote: > It was also designed to have a virtual stack, which would spill to memory > on overflow, and back on underflow. That sounds nice, but it seems that > no-one tried to write the interrupt routine before the hardware was built, > and that it actually isn't possible. It seems that it isn't possible to get some > of the state bits set, such that it all works like a seamless virtual stack. How efficient is a virtual stack? Did anybody try to use ordinary (integral...) registers with interrupt driven spilling? A stack machine is convenient for calculations. Before the stack overflows the compiler can save intermediate results, as with any other architecture of limited register count. DoDi [Normal stack machines have the top few entries in registers and do the spilling to memory in hardware. The x87 stack has 8 registers, which is a lot for a stack machine, but the spilling was broken. You can address into the stack but you can't really use it as a register machine. -John]