Path: csiph.com!xmission!news.snarked.org!border2.nntp.dca1.giganews.com!nntp.giganews.com!news.iecc.com!.POSTED.news.iecc.com!nerds-end
From: Kaz Kylheku <793-849-0957@kylheku.com>
Newsgroups: comp.compilers
Subject: Re: Bit swizzling
Date: Sat, 5 Sep 2020 20:15:50 +0000 (UTC)
Organization: Aioe.org NNTP Server
Lines: 12
Sender: news@iecc.com
Approved: comp.compilers@iecc.com
Message-ID: <20-09-017@comp.compilers>
References: <20-09-014@comp.compilers>
Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="25441"; mail-complaints-to="abuse@iecc.com"
Keywords: optimize
Posted-Date: 05 Sep 2020 16:21:49 EDT
X-submission-address: compilers@iecc.com
X-moderator-address: compilers-request@iecc.com
X-FAQ-and-archives: http://compilers.iecc.com
Xref: csiph.com comp.compilers:2588

On 2020-09-05, Rick C. Hodgin <rick.c.hodgin@gmail.com> wrote:
> Are there any existing algorithms which examine the operations that
> must be conducted and then create an optimized / minimal sequence of
> mechanical steps to conduct it given a constrained set of features
> (such as those present on a given CPU)?

For mapping 8 bit quantities to other 8 bit quantities, you can always
use a 256 byte look up table.

Of course, it's not practical for larger spaces. Still, it may be possibel to
identify the possibility of involving multiple smaller look-up tables.