Path: csiph.com!xmission!news.snarked.org!border2.nntp.dca1.giganews.com!nntp.giganews.com!news.iecc.com!.POSTED.news.iecc.com!nerds-end From: gah4@u.washington.edu Newsgroups: comp.compilers Subject: Re: C compiler pointer management on DSPs Date: Thu, 27 Feb 2020 14:23:05 -0800 (PST) Organization: Compilers Central Lines: 31 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <20-02-024@comp.compilers> References: <19-09-003@comp.compilers> <19-09-004@comp.compilers> <19-09-006@comp.compilers> <19-09-007@comp.compilers> <19-09-009@comp.compilers> <19-09-015@comp.compilers> <19-09-017@comp.compilers> <19-09-018@comp.compilers> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="5461"; mail-complaints-to="abuse@iecc.com" Keywords: architecture, history Posted-Date: 27 Feb 2020 17:37:18 EST X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com In-Reply-To: <19-09-018@comp.compilers> Xref: csiph.com comp.compilers:2462 On Monday, September 30, 2019 at 3:06:36 PM UTC-7, David Brown wrote: (snip) > Some processors have larger access sizes to simplify the hardware. The > first DEC Alpha, and some ARM designs, had no instructions for reading > or writing 8-bit or 16-bit data. In effect, these had 32-bit (maybe on > the Alpha it was 64-bit) "byte" sizes. But smaller access sizes could > be easily simulated in software. Alpha isn't quite that bad. The load/store instructions work on 32 or 64 bit units, but they ignore the low bits when doing it. So, you take a byte address, and use a load instruction to load its word into a register. (I forget now the names of the memory units.) Then there are instructions for operating on bytes in a register which ignore the high bits. So, you can load a byte from memory into a register with two instructions. To store a byte, I believe you load the word, replace the byte, and write it back, so three instructions. Note that those operations are what CISC processors do without you thinking about them on many machines, as memory is often much wider than 8 bits. Machines not so well designed require masking off the appropriate bits before operating with them, though many machines ignore high bits on shift operations. (The 8086 allows shifts up to 255 bits.)