Path: csiph.com!x330-a1.tempe.blueboxinc.net!newsfeed.hal-mli.net!feeder3.hal-mli.net!newsfeed.hal-mli.net!feeder1.hal-mli.net!nx02.iad01.newshosting.com!newshosting.com!news-out.readnews.com!news-xxxfer.readnews.com!news.misty.com!news.iecc.com!lnews.iecc.com!nerds-end From: amker Newsgroups: comp.compilers Subject: Re: How to eliminate redundant constant move instructions Date: Tue, 1 Nov 2011 19:01:21 -0700 (PDT) Organization: Compilers Central Lines: 46 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <11-11-007@comp.compilers> References: <11-10-019@comp.compilers> <11-11-002@comp.compilers> NNTP-Posting-Host: lnews.iecc.com X-Trace: gal.iecc.com 1320200799 30567 64.57.183.34 (2 Nov 2011 02:26:39 GMT) X-Complaints-To: abuse@iecc.com NNTP-Posting-Date: Wed, 2 Nov 2011 02:26:39 +0000 (UTC) Keywords: optimize Posted-Date: 01 Nov 2011 22:26:39 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Xref: x330-a1.tempe.blueboxinc.net comp.compilers:309 On Nov 1, 1:08 am, Kaz Kylheku wrote: > On 2011-10-31, Amker.Cheng wrote: > > > I found following intermediate codes are generated in gcc > > > rx <- 0 > > ... > > use rx > > ... > > ry <- 0 > > use ry > > ... > > > It's normally a result of const propagation. > > After register allocation, It is likely rx/ry get allocated into > > different hard registers. > > Thus in final codes, there would be a redundant "move 0" instruction. > > Surely you mean, if they get allocated into the SAME register, there > will be a redundant initialization? Something like that. In register allocation, if there is no register pressure issue, the program should be converted into rx <- 0 ... use rx ... rx <- 0 <----which is redundant and can be removed use rx > > The story even stands for Os compiling, so the question is: > > Is there any optimization technique dedicates to this kind of case? > > It's a variant of ``common subexpression elimination''. This should > be done early on. You have two different instances of 0 in the code, > which should be recognized as a common subexpression, sharing the same > intermediate code, and virtual registers. Yes, I just found gcc's cse pass can handle such cases in extended basic block, but not globally. Another question is, if we do it before register allocation, the live range of rx would be extended and might cause spill in register allocation. Thanks