Path: csiph.com!x330-a1.tempe.blueboxinc.net!newsfeed.hal-mli.net!feeder3.hal-mli.net!newsfeed.hal-mli.net!feeder1.hal-mli.net!border3.nntp.dca.giganews.com!border1.nntp.dca.giganews.com!nntp.giganews.com!news.iecc.com!lnews.iecc.com!nerds-end From: Kaz Kylheku Newsgroups: comp.compilers Subject: Re: How to eliminate redundant constant move instructions Date: Mon, 31 Oct 2011 17:08:54 +0000 (UTC) Organization: A noiseless patient Spider Lines: 27 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <11-11-002@comp.compilers> References: <11-10-019@comp.compilers> NNTP-Posting-Host: lnews.iecc.com X-Trace: gal.iecc.com 1320177574 30567 64.57.183.34 (1 Nov 2011 19:59:34 GMT) X-Complaints-To: abuse@iecc.com NNTP-Posting-Date: Tue, 1 Nov 2011 19:59:34 +0000 (UTC) Keywords: optimize Posted-Date: 01 Nov 2011 15:59:34 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Xref: x330-a1.tempe.blueboxinc.net comp.compilers:304 On 2011-10-31, Amker.Cheng wrote: > I found following intermediate codes are generated in gcc > > rx <- 0 > ... > use rx > ... > ry <- 0 > use ry > ... > > It's normally a result of const propagation. > After register allocation, It is likely rx/ry get allocated into > different hard registers. > Thus in final codes, there would be a redundant "move 0" instruction. Surely you mean, if they get allocated into the SAME register, there will be a redundant initialization? > The story even stands for Os compiling, so the question is: > Is there any optimization technique dedicates to this kind of case? It's a variant of ``common subexpression elimination''. This should be done early on. You have two different instances of 0 in the code, which should be recognized as a common subexpression, sharing the same intermediate code, and virtual registers.