Path: csiph.com!x330-a1.tempe.blueboxinc.net!newsfeed.hal-mli.net!feeder3.hal-mli.net!nx01.iad01.newshosting.com!newshosting.com!novia!border4.nntp.dca.giganews.com!border2.nntp.dca.giganews.com!nntp.giganews.com!news.iecc.com!nerds-end From: Hans Aberg Newsgroups: comp.compilers Subject: Re: optimizing Date: Sat, 13 Aug 2011 18:12:38 +0200 Organization: A noiseless patient Spider Lines: 17 Sender: news@iecc.com Approved: comp.compilers@iecc.com Message-ID: <11-08-019@comp.compilers> References: <11-08-015@comp.compilers> NNTP-Posting-Host: news.iecc.com X-Trace: gal.iecc.com 1313368104 24792 64.57.183.58 (15 Aug 2011 00:28:24 GMT) X-Complaints-To: abuse@iecc.com NNTP-Posting-Date: Mon, 15 Aug 2011 00:28:24 +0000 (UTC) Keywords: optimize Posted-Date: 14 Aug 2011 20:28:23 EDT X-submission-address: compilers@iecc.com X-moderator-address: compilers-request@iecc.com X-FAQ-and-archives: http://compilers.iecc.com Xref: x330-a1.tempe.blueboxinc.net comp.compilers:236 On 2011/08/12 06:05, John Levine wrote: > On 2011/08/12 06:05, glen herrmannsfeldt wrote: >> ... Someone was wondering if any >> optimization was done at link time. > [This is pretty standard in the toolchains for embedded processors. I > gather that the ARM compilers generate intermediate code, and all the > optimization and code generation happens in the linker. -John] I think that part of the reason that Apple switched to an LLVM based compiler is that it can generate intermediate code that can be optimized depending on what GPU is present. Perhaps it makes a switch from Intel to ARM simpler. Hans