Path: csiph.com!x330-a1.tempe.blueboxinc.net!newsfeed.hal-mli.net!feeder3.hal-mli.net!newsfeed.hal-mli.net!feeder1.hal-mli.net!eternal-september.org!feeder.eternal-september.org!mx04.eternal-september.org!.POSTED!not-for-mail From: Anne & Lynn Wheeler Newsgroups: comp.arch Subject: Re: M68k add to memory is not a mistake any more Date: Sat, 25 Feb 2012 11:15:59 -0500 Organization: Wheeler&Wheeler Lines: 34 Message-ID: References: <4F47CEE5.6000107@SPAM.comp-arch.net> <70cead58-3bc7-468c-9c81-047bb5044be6@b23g2000yqn.googlegroups.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Injection-Info: mx04.eternal-september.org; posting-host="flB8D8UDsSa5S1dRygySQg"; logging-data="1963"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18d4r3dfNPdVLUkbNxwqwO9bWEeJ5aRr0Q=" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (gnu/linux) Cancel-Lock: sha1:jU+S0hXDyuVOO4zsOwv2Mw+AL00= sha1:kLvFn2ebBN60rJ2dmLrhGpqxDYo= Xref: x330-a1.tempe.blueboxinc.net comp.arch:6077 Quadibloc writes: > There is a connection between re-entrant code and interrupts. If any > subroutine is called by programs that can be interrupted which is also > called by the interrupt service routines, that subroutine has to be > fully re-entrant. But that restriction applies to subroutines provided > by the operating system as part of its API, not to every piece of code > written by users to solve their problems. This was sort of how we got atomic compare&swap instruction out. Charlie had invented compare&swap (mnenomic CAS are his initials) while doing fine-grain multiprocessor locking work on cp67 at the science center ... misc. past posts mentioning science center http://www.garlic.com/~lynn/subtopic.html#545tech Initial attempts to get compare&swap included in 370 architecture was rebuffed by the architecture owners; their comment was that the favorite son operating system people were saying test&set was more than adequate for multiprocessor locking. The challenge was to come up with a justification that wasn't multiprocessor specific. Thus was born the examples for multi-threaded application code (that was enabled for interrupts) like large DBMS (that required serialization/locking) ... and compare&swap got included in 370 architecture. misc. past posts mentioning multiprocessor and/or compare&swap http://www.garilc.com/~lynn/subtopic.html#smp the examples continue to survive (multiprogramming is mainframe speak for multi-threaded) 40yrs later Multiprogramming and Multiprocessing Examples http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/A.6?SHELF=DZ9ZBK03&DT=20040504121320 -- virtualization experience starting Jan1968, online at home since Mar1970