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| Newsgroups | comp.arch.fpga |
|---|---|
| Date | 2017-11-10 13:15 -0800 |
| References | <2f3344b5-c9b4-4cee-bbf9-bd96efb89497@googlegroups.com> <ou4vmk$t3n$1@dont-email.me> <9d1a9600-7ce0-46d0-bcf8-7b208ef15f48@googlegroups.com> |
| Message-ID | <efb0c0f1-18d9-4bf4-b937-a954b8b1403f@googlegroups.com> (permalink) |
| Subject | Re: FPGA motherboard for 80386 CPU |
| From | lasselangwadtchristensen@gmail.com |
Den fredag den 10. november 2017 kl. 21.20.02 UTC+1 skrev Rick C. Hodgin: > On Friday, November 10, 2017 at 2:46:34 PM UTC-5, rickman wrote: > > Rick C. Hodgin wrote on 11/10/2017 10:35 AM: > > > The 80386DX CPU had 132 pins: > > > > > > 80386DX and 80386SX pinouts: > > > http://www.rfwireless-world.com/images/80386-pin-diagram.jpg > > > https://image.slidesharecdn.com/salientfeatursof80386-140822084001-phpapp02/95/salient-featurs-of-80386-14-638.jpg?cb=1408709884 > > > > > > General architecture: > > > http://www.nptel.ac.in/courses/Webcourse-contents/IISc-BANG/Microprocessors%20and%20Microcontrollers/pdf/Teacher_Slides/mod8/M8L1.pdf > > > > > > Of these pins on the DX variant: > > > > > > 32 pins -- data > > > 30 pins -- address > > > 4 pins -- byte enables in 32-bit writes > > > 1 pin -- Read/write > > > 1 pin -- Data/Control > > > 1 pin -- Memory/IO > > > 1 pin -- Bus mastering lock issued by CPU > > > 1 pin -- Bus16 size (16-bit when asserted, normally 32-bit) > > > 1 pin -- Next address (for pipelining) > > > 1 pin -- Address valid signal > > > -- > > > 73 pins -- For basic I/O > > > > > > 3 pins -- Math-coprocessor support > > > 1 pin -- Ready (or Wait, for bus cycles to complete) > > > 2 pins -- Hold and Hold Acknowledge (for bus mastering) > > > 2 pins -- Interrupt and Non-masktable Interrupt > > > -- > > > 8 pins -- General coordination with external peripherals > > > > > > 1 pin -- Reset > > > 1 pin -- Double-pumped clock > > > -- > > > 2 pins -- System input > > > > > > The rest of the pins are unused, go to VSS or VCC. This means that for a > > > full 80386 "motherboard" only 83 pins are required to fully support its > > > operation, 67 of which are address, data, and data type, leaving really > > > only 15 pins of complex operation for a state machine. > > > > > > ----- > > > Would anybody be able to help me create this 80386 motherboard using an > > > AMD Am386 CPU, which is a static CPU operating from 0 to 40 MHz? I would > > > like to get it working with a single-step operation for design validation, > > > and then to begin ramping it up. > > > > > > I figure I'll have an area of ROM which the CPU boots to load, which is a > > > tiny real mode program, which begins computing something that can be exam- > > > ined by the FPGA to test successful operation. And then move on to more > > > complex operations, including a custom microkernel. > > > > I'm sure many here would be *able* to help you. The question you should be > > asking is who would be *willing* to help you... > > > > What parts are you having trouble with? Why do you need help exactly? > > The 80386DX was a 5V part. My FPGA supports 3.3V, so I need some > kind of level shifter? I'll need to build a breakout board to route > through my existing 40-pin FPGA breakout ports (160 pins). So, do > I go with an online custom manufacturer? Buy materials and pattern > and etch my own board, soldering everything myself? Are there generic > sockets the Am386 would fit in which are already broken out? > > I need help with the mechanics of Verilog. I know how I want things > to route, but the mechanics of the language confuse me. I don't > understand why at times I need registers, and other times I can > route wires. The assignments are confusing me, when to use <= and > when not to, etc. then you should probably start with a basic verilog project with some blinking leds and not a giant hairball of a CISC cpu...
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FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 07:35 -0800
Re: FPGA motherboard for 80386 CPU rickman <gnuarm@gmail.com> - 2017-11-10 14:46 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 12:19 -0800
Re: FPGA motherboard for 80386 CPU rickman <gnuarm@gmail.com> - 2017-11-10 16:11 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 14:14 -0800
Re: FPGA motherboard for 80386 CPU rickman <gnuarm@gmail.com> - 2017-11-10 18:31 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 15:59 -0800
Re: FPGA motherboard for 80386 CPU rickman <gnuarm@gmail.com> - 2017-11-10 22:15 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 20:16 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-11 10:43 -0800
Re: FPGA motherboard for 80386 CPU lasselangwadtchristensen@gmail.com - 2017-11-10 13:15 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-10 14:02 -0800
Re: FPGA motherboard for 80386 CPU lasselangwadtchristensen@gmail.com - 2017-11-13 08:28 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-13 08:49 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-13 09:33 -0800
Re: FPGA motherboard for 80386 CPU lasselangwadtchristensen@gmail.com - 2017-11-13 11:47 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-13 11:54 -0800
Re: FPGA motherboard for 80386 CPU lasselangwadtchristensen@gmail.com - 2017-11-13 12:06 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-11-13 12:15 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-21 01:33 -0800
Re: FPGA motherboard for 80386 CPU Richard Damon <Richard@Damon-Family.org> - 2017-12-22 19:23 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-24 14:04 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-20 05:49 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-12 12:10 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-14 06:29 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-28 07:32 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-30 09:54 -0800
Re: FPGA motherboard for 80386 CPU Richard Damon <Richard@Damon-Family.org> - 2017-12-30 15:18 -0500
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-31 00:20 -0800
Re: FPGA motherboard for 80386 CPU Emilian Miron <emilian.miron@gmail.com> - 2017-12-31 07:20 -0800
Re: FPGA motherboard for 80386 CPU "Rick C. Hodgin" <rick.c.hodgin@gmail.com> - 2017-12-31 13:52 -0800
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