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Re: arm-gcc, Cortex-M0+, uint64_t and alignment

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Il 20/01/2026 18:44, David Brown ha scritto:
> On 20/01/2026 18:09, pozz wrote:
>> Il 20/01/2026 17:41, Grant Edwards ha scritto:
>>> On 2026-01-20, David Brown <david.brown@hesbynett.no> wrote:
>>>
>>>> You can't reduce the alignment of a struct or its elements by adding an
>>>> __aligned_ attribute to the struct itself or any of its fields.  The
>>>> best you can do on the struct itself is __attribute__((packed)).  But
>>>> that can come with disadvantages, and inefficient use.
>>>
>>> Yep making a structure aligned is an excellent way to introduce subtle
>>> bugs that happen when somebody, somewhere passes a pointer to one of
>>> those structure fields to some library function. 
>>
>> However, as long as the application runs on Cortex-M0+, the aligned 
>> version shouldn't introduce issues, should it?
>>
>>
> 
> Correctly aligned data is never a problem.  /Misaligned/ data is a problem.
> 
> The Cortex-M0+ cannot access misaligned data directly.  But if the 
> compiler knows that it is misaligned - by "packed" struct, or "aligned" 
> attribute on the typedef - it should break apart the accesses into bytes 
> or 16-bit half-words as necessary.  (Aligning a uint64_t to 4 byte 
> alignment will not be a problem.)

However for Cortex-M0+ uint64_t aligned at 4 bytes is:
- aligned for the core (two 4-bytes aligned accesses are required)
- misaligned for the ABI and the compiler

We agree that forcing the gcc compiler to consider 4-bytes as the 
required alignment of uint64_t (using aligned attribute) is always safe. 
However, what really changes in the binary output?

In some cases, the address of uint64_t can change from 8-bytes to 
4-bytes aligned address (because we instructed it to do so). What about 
the code that accesses uint64_t aligned to 4-bytes? Is it identical 
between 4- and 8-bytes alignment requirement? I think so, because in 
both case, the compiler should add two load/store 4-bytes instructions.

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arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-20 13:26 +0100
  Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-20 17:07 +0100
    Re: arm-gcc, Cortex-M0+, uint64_t and alignment Grant Edwards <invalid@invalid.invalid> - 2026-01-20 16:41 +0000
      Re: arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-20 18:09 +0100
        Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-20 18:44 +0100
          Re: arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-21 09:11 +0100
            Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-21 10:02 +0100
              Re: arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-21 15:58 +0100
                Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-21 17:13 +0100
                Re: arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-21 17:57 +0100
                Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-22 10:03 +0100
        Re: arm-gcc, Cortex-M0+, uint64_t and alignment Grant Edwards <invalid@invalid.invalid> - 2026-01-20 17:48 +0000
      Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-20 18:41 +0100
        Re: arm-gcc, Cortex-M0+, uint64_t and alignment Grant Edwards <invalid@invalid.invalid> - 2026-01-20 18:10 +0000
          Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-20 22:32 +0100
            Re: arm-gcc, Cortex-M0+, uint64_t and alignment Grant Edwards <invalid@invalid.invalid> - 2026-01-21 03:38 +0000
              Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-21 08:54 +0100
    Re: arm-gcc, Cortex-M0+, uint64_t and alignment pozz <pozzugno@gmail.com> - 2026-01-20 17:55 +0100
      Re: arm-gcc, Cortex-M0+, uint64_t and alignment David Brown <david.brown@hesbynett.no> - 2026-01-20 22:24 +0100

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