Path: csiph.com!aioe.org!.POSTED!not-for-mail From: Terje Mathisen Newsgroups: comp.arch.arithmetic Subject: Re: Quiet NaN question Date: Sun, 19 Jun 2016 01:08:47 +0300 Organization: Aioe.org NNTP Server Lines: 30 Message-ID: References: NNTP-Posting-Host: 2S1dGCaZr3JcU9HkEaV5UQ.user.gioia.aioe.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Complaints-To: abuse@aioe.org User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:43.0) Gecko/20100101 Firefox/43.0 SeaMonkey/2.40 X-Notice: Filtered by postfilter v. 0.8.2 Xref: csiph.com comp.arch.arithmetic:90 Bonita Montero wrote: > My SSE-FPU generates the following NaNs: > > * When I do a any basic dual operation like ADDSD, SUBSD, MULSD or DIVSD > and one of both operands is a NaN, the result has the sign of the NaN > -operand and the lower 51 bits of the mantissa of the result is loa- > ded with the lower 51 bits of the mantissa of the NaN-operand. > * When both operations are NaN, the result is loaded with the sign of > the destination-register and the lower 51 bits of the result-mantissa > is loaded with the lower 51 bits of the destination-register before > the operation. So the associative law doesn't count here and the order > of the operands in a multiplication does count! > * When I do a SQRTSD on a NaN-value, the result has the sign of the > NaN-operand and the lower 51 bits of the result is loaded with the > lower 51 bits of the operand. > * When I do a multiplication of infinity with zero or infinity, I always > get -NaN as a result (binary representation 0xFFF8000000000000u). > > Is this behaviour determined anywhere in the IEEE-754-standard? > Yes, a least most of it. In particular operations on NaN(s) intentionally breaks associativity, look at comparisons. Terje -- - "almost all programming can be viewed as an exercise in caching"